From 010365f81b173d359451721e5573b5d34555adef Mon Sep 17 00:00:00 2001 From: ian Date: Mon, 4 May 2015 14:55:21 +0000 Subject: [PATCH] On an icache sync by address/len, round the length up if the operation spans a cacheline boundary. PR: 199740 Submitted by: Juergen Weiss --- sys/arm/arm/cpufunc_asm_armv7.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/arm/arm/cpufunc_asm_armv7.S b/sys/arm/arm/cpufunc_asm_armv7.S index 25f052fd5553..7016d7eeffb0 100644 --- a/sys/arm/arm/cpufunc_asm_armv7.S +++ b/sys/arm/arm/cpufunc_asm_armv7.S @@ -266,6 +266,9 @@ END(armv7_icache_sync_all) ENTRY_NP(armv7_icache_sync_range) ldr ip, .Larmv7_icache_line_size ldr ip, [ip] + sub r3, ip, #1 /* Address need not be aligned, but */ + and r2, r0, r3 /* round length up if op spans line */ + add r1, r1, r2 /* boundary: len += addr & linemask; */ .Larmv7_sync_next: mcr CP15_DCCMVAC(r0) mcr CP15_ICIMVAU(r0)