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Pull in r357528 from upstream llvm trunk (by Craig Topper):

Browse Source 
[X86] Check MI.isConvertibleTo3Addr() before calling
  convertToThreeAddress in X86FixupLEAs.

  X86FixupLEAs just assumes convertToThreeAddress will return nullptr
  for any instruction that isn't convertible.

  But the code in convertToThreeAddress for X86 assumes that any
  instruction coming in has at least 2 operands and that the second one
  is a register. But those properties aren't guaranteed of all
  instructions. We should check the instruction property first.

Pull in r365720 from upstream llvm trunk (by Craig Topper):

  [X86] Don't convert 8 or 16 bit ADDs to LEAs on Atom in FixupLEAPass.

  We use the functions that convert to three address to do the
  conversion, but changing an 8 or 16 bit will cause it to create a
  virtual register. This can't be done after register allocation where
  this pass runs.

  I've switched the pass completely to a white list of instructions
  that can be converted to LEA instead of a blacklist that was
  incorrect. This will avoid surprises if we enhance the three address
  conversion function to include additional instructions in the future.

  Fixes PR42565.

This should fix assertions/segfaults when compiling certain ports with
CPUTYPE=atom.

PR:		240928
MFC after:	3 days
This commit is contained in:
Dimitry Andric 2019-09-30 19:24:21 +00:00
parent ea2609a490
commit 02a0b45ff6
1 changed files with 21 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
contrib/llvm/lib/Target/X86/X86FixupLEAs.cpp
View File

@ -154,6 +154,15 @@ FixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI,
MFI->insert(MBBI, NewMI); // Insert the new inst
return NewMI;
}
}
if (!MI.isConvertibleTo3Addr())
return nullptr;
switch (MI.getOpcode()) {
default:
// Only convert instructions that we've verified are safe.
return nullptr;
case X86::ADD64ri32:
case X86::ADD64ri8:
case X86::ADD64ri32_DB:
@ -162,24 +171,24 @@ FixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI,
case X86::ADD32ri8:
case X86::ADD32ri_DB:
case X86::ADD32ri8_DB:
case X86::ADD16ri:
case X86::ADD16ri8:
case X86::ADD16ri_DB:
case X86::ADD16ri8_DB:
if (!MI.getOperand(2).isImm()) {
// convertToThreeAddress will call getImm()
// which requires isImm() to be true
return nullptr;
}
break;
case X86::ADD16rr:
case X86::ADD16rr_DB:
if (MI.getOperand(1).getReg() != MI.getOperand(2).getReg()) {
// if src1 != src2, then convertToThreeAddress will
// need to create a Virtual register, which we cannot do
// after register allocation.
return nullptr;
}
case X86::SHL64ri:
case X86::SHL32ri:
case X86::INC64r:
case X86::INC32r:
case X86::DEC64r:
case X86::DEC32r:
case X86::ADD64rr:
case X86::ADD64rr_DB:
case X86::ADD32rr:
case X86::ADD32rr_DB:
// These instructions are all fine to convert.
break;
}
return TII->convertToThreeAddress(MFI, MI, nullptr);
}