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urtwn: add bits for R92C_HWSEQ_CTRL and R92C_TXPAUSE registers

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Reviewed by:	kevlo
Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D4770
This commit is contained in:
avos 2016-01-04 21:16:49 +00:00
parent eaee2d4699
commit 0375989a07
2 changed files with 21 additions and 3 deletions
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6
sys/dev/usb/wlan/if_urtwn.c
View File

@ -2277,7 +2277,7 @@ urtwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
case IEEE80211_S_SCAN: case IEEE80211_S_SCAN:
/* Pause AC Tx queues. */ /* Pause AC Tx queues. */
urtwn_write_1(sc, R92C_TXPAUSE, urtwn_write_1(sc, R92C_TXPAUSE,
urtwn_read_1(sc, R92C_TXPAUSE) | 0x0f); urtwn_read_1(sc, R92C_TXPAUSE) | R92C_TX_QUEUE_AC);
break; break;
case IEEE80211_S_AUTH: case IEEE80211_S_AUTH:
urtwn_set_chan(sc, ic->ic_curchan, NULL); urtwn_set_chan(sc, ic->ic_curchan, NULL);
@ -4425,7 +4425,7 @@ urtwn_lc_calib(struct urtwn_softc *sc)
} }
} else { } else {
/* Block all Tx queues. */ /* Block all Tx queues. */
urtwn_write_1(sc, R92C_TXPAUSE, 0xff); urtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
} }
/* Start calibration. */ /* Start calibration. */
urtwn_rf_write(sc, 0, R92C_RF_CHNLBW, urtwn_rf_write(sc, 0, R92C_RF_CHNLBW,
@ -4640,7 +4640,7 @@ urtwn_init(struct urtwn_softc *sc)
ieee80211_runtask(ic, &sc->cmdq_task); ieee80211_runtask(ic, &sc->cmdq_task);
/* Enable hardware sequence numbering. */ /* Enable hardware sequence numbering. */
urtwn_write_1(sc, R92C_HWSEQ_CTRL, 0xff); urtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL);
/* Enable per-packet TX report. */ /* Enable per-packet TX report. */
if (sc->chip & URTWN_CHIP_88E) { if (sc->chip & URTWN_CHIP_88E) {

18
sys/dev/usb/wlan/if_urtwnreg.h
View File

@ -496,6 +496,24 @@
#define R92C_EDCA_PARAM_TXOP_M 0xffff0000 #define R92C_EDCA_PARAM_TXOP_M 0xffff0000
#define R92C_EDCA_PARAM_TXOP_S 16 #define R92C_EDCA_PARAM_TXOP_S 16
/* Bits for R92C_HWSEQ_CTRL / R92C_TXPAUSE. */
#define R92C_TX_QUEUE_VO 0x01
#define R92C_TX_QUEUE_VI 0x02
#define R92C_TX_QUEUE_BE 0x04
#define R92C_TX_QUEUE_BK 0x08
#define R92C_TX_QUEUE_MGT 0x10
#define R92C_TX_QUEUE_HIGH 0x20
#define R92C_TX_QUEUE_BCN 0x40
/* Shortcuts. */
#define R92C_TX_QUEUE_AC \
(R92C_TX_QUEUE_VO | R92C_TX_QUEUE_VI | \
R92C_TX_QUEUE_BE | R92C_TX_QUEUE_BK)
#define R92C_TX_QUEUE_ALL \
(R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | \
R92C_TX_QUEUE_HIGH | R92C_TX_QUEUE_BCN | 0x80) /* XXX */
/* Bits for R92C_BCN_CTRL. */ /* Bits for R92C_BCN_CTRL. */
#define R92C_BCN_CTRL_EN_MBSSID 0x02 #define R92C_BCN_CTRL_EN_MBSSID 0x02
#define R92C_BCN_CTRL_TXBCN_RPT 0x04 #define R92C_BCN_CTRL_TXBCN_RPT 0x04