Additional register definitions.
Obtained from: NetBSD
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@ -206,6 +206,9 @@
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#define PCN_MODE_RXNOBROAD 0x4000
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#define PCN_MODE_PROMISC 0x8000
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/* Settings for PCN_MODE_PORTSEL when ASEL (BCR2[1] is 0 */
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#define PCN_PORT_AUI 0x0000
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#define PCN_PORT_10BASET 0x0080
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#define PCN_PORT_GPSI 0x0100
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#define PCN_PORT_MII 0x0180
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@ -236,6 +239,8 @@
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/*
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* BCR (bus control) registers
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*/
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#define PCN_BCR_MMRA 0x00 /* Master Mode Read Active */
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#define PCN_BCR_MMW 0x01 /* Master Mode Write Active */
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#define PCN_BCR_MISCCFG 0x02
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#define PCN_BCR_LED0 0x04
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#define PCN_BCR_LED1 0x05
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@ -269,10 +274,23 @@
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#define PCN_BCR_ONNOWPAT2 0x2F
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#define PCN_BCR_PHYSEL 0x31
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/*
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* Miscellaneous Configuration (BCR2)
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*/
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#define PCN_MISC_TMAULOOP 1<<14 /* T-MAU Loopback packet enable. */
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#define PCN_MISC_LEDPE 1<<12 /* LED Program Enable */
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#define PCN_MISC_APROMWE 1<<8 /* Address PROM Write Enable */
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#define PCN_MISC_INTLEVEL 1<<7 /* Interrupt level */
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#define PCN_MISC_EADISEL 1<<3 /* EADI Select */
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#define PCN_MISC_AWAKE 1<<2 /* Power saving mode select */
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#define PCN_MISC_ASEL 1<<1 /* Auto Select */
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#define PCN_MISC_XMAUSEL 1<<0 /* Reserved. */
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/*
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* Full duplex control (BCR9)
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*/
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#define PCN_DUPLEX_FDEN 0x0001 /* Full-duplex enable */
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#define PCN_DUPLEX_AUI 0x0002 /* AUI full-duplex */
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#define PCN_DUPLEX_FDRPAD 0x0004 /* Full-duplex runt pkt accept dis. */
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/*
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@ -496,7 +514,7 @@ struct pcn_softc {
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#define PCN_PCI_INTLINE 0x3C
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#define PCN_PCI_INTPIN 0x3D
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#define PCN_PCI_MINGNT 0x3E
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#define PCN_PCI_MINLAT 0x0F
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#define PCN_PCI_MINLAT 0x3F
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#define PCN_PCI_RESETOPT 0x48
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#define PCN_PCI_EEPROM_DATA 0x4C
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