Remove DTS files for arm boards we don't support
These are all FreeBS-specific device tree files. We don't support any of these anymore, remove them. Reviewed by: emaste, manu Sponsored by: Innovate UK Differential Revision: https://reviews.freebsd.org/D28365
This commit is contained in:
Andrew Turner
parent
6c7a932d0b
commit
042ef1f115
@ -1,332 +0,0 @@
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/*
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* Copyright (c) 2010 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Semihalf under sponsorship from
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* the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Marvell DB-78100 Device Tree Source.
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/ {
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model = "mrvl,DB-78100";
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compatible = "DB-78100-BP", "DB-78100-BP-A";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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serial0 = &serial0;
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serial1 = &serial1;
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mpp = &MPP;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "ARM,88FR571";
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reg = <0x0>;
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x4000>; // L1, 16K
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i-cache-size = <0x4000>; // L1, 16K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x20000000>; // 512M at 0x0
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};
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localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "mrvl,lbc";
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bank-count = <5>;
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/* This reflects CPU decode windows setup. */
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ranges = <0x0 0x2f 0xf9300000 0x00100000
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0x1 0x3e 0xf9400000 0x00100000
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0x2 0x3d 0xf9500000 0x02000000
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0x3 0x3b 0xfb500000 0x00100000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x00100000>;
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};
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led@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "led";
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reg = <0x1 0x0 0x00100000>;
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};
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nor@2,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x2 0x0 0x02000000>;
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};
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nand@3,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mrvl,nfc";
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reg = <0x3 0x0 0x00100000>;
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};
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};
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soc78100@f1000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0x0 0xf1000000 0x00100000>;
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bus-frequency = <0>;
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PIC: pic@20200 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <0x20200 0x3c>;
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compatible = "mrvl,pic";
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};
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timer@20300 {
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compatible = "mrvl,timer";
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reg = <0x20300 0x30>;
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interrupts = <8>;
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interrupt-parent = <&PIC>;
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mrvl,has-wdt;
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};
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MPP: mpp@10000 {
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#pin-cells = <2>;
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compatible = "mrvl,mpp";
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reg = <0x10000 0x34>;
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pin-count = <50>;
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pin-map = <
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0 2 /* MPP[0]: GE1_TXCLK */
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1 2 /* MPP[1]: GE1_TXCTL */
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2 2 /* MPP[2]: GE1_RXCTL */
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3 2 /* MPP[3]: GE1_RXCLK */
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4 2 /* MPP[4]: GE1_TXD[0] */
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5 2 /* MPP[5]: GE1_TXD[1] */
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6 2 /* MPP[6]: GE1_TXD[2] */
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7 2 /* MPP[7]: GE1_TXD[3] */
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8 2 /* MPP[8]: GE1_RXD[0] */
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9 2 /* MPP[9]: GE1_RXD[1] */
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10 2 /* MPP[10]: GE1_RXD[2] */
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11 2 /* MPP[11]: GE1_RXD[3] */
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13 3 /* MPP[13]: SYSRST_OUTn */
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14 3 /* MPP[14]: SATA1_ACTn */
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15 3 /* MPP[15]: SATA0_ACTn */
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16 4 /* MPP[16]: UA2_TXD */
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17 4 /* MPP[17]: UA2_RXD */
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18 3 /* MPP[18]: <UNKNOWN> */
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19 3 /* MPP[19]: <UNKNOWN> */
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20 3 /* MPP[20]: <UNKNOWN> */
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21 3 /* MPP[21]: <UNKNOWN> */
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22 4 /* MPP[22]: UA3_TXD */
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23 4 >; /* MPP[21]: UA3_RXD */
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};
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GPIO: gpio@10100 {
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#gpio-cells = <2>;
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compatible = "mrvl,gpio";
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reg = <0x10100 0x20>;
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gpio-controller;
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interrupts = <56 57 58 59>;
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interrupt-parent = <&PIC>;
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};
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rtc@10300 {
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compatible = "mrvl,rtc";
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reg = <0x10300 0x08>;
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};
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twsi@11000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mrvl,twsi";
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reg = <0x11000 0x20>;
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interrupts = <2>;
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interrupt-parent = <&PIC>;
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};
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twsi@11100 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mrvl,twsi";
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reg = <0x11100 0x20>;
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interrupts = <3>;
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interrupt-parent = <&PIC>;
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};
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enet0: ethernet@72000 {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "V2";
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compatible = "mrvl,ge";
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reg = <0x72000 0x2000>;
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ranges = <0x0 0x72000 0x2000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <41 42 43 40 70>;
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interrupt-parent = <&PIC>;
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phy-handle = <&phy0>;
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "mrvl,mdio";
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phy0: ethernet-phy@0 {
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reg = <0x8>;
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};
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phy1: ethernet-phy@1 {
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reg = <0x9>;
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};
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};
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};
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enet1: ethernet@76000 {
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#address-cells = <1>;
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#size-cells = <1>;
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model = "V2";
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compatible = "mrvl,ge";
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reg = <0x76000 0x2000>;
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ranges = <0x0 0x76000 0x2000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <45 46 47 44 70>;
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interrupt-parent = <&PIC>;
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phy-handle = <&phy1>;
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};
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serial0: serial@12000 {
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compatible = "ns16550";
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reg = <0x12000 0x20>;
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reg-shift = <2>;
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clock-frequency = <0>;
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interrupts = <12>;
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interrupt-parent = <&PIC>;
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};
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serial1: serial@12100 {
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compatible = "ns16550";
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reg = <0x12100 0x20>;
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reg-shift = <2>;
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clock-frequency = <0>;
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interrupts = <13>;
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interrupt-parent = <&PIC>;
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};
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usb@50000 {
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compatible = "mrvl,usb-ehci", "usb-ehci";
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reg = <0x50000 0x1000>;
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interrupts = <72 16>;
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interrupt-parent = <&PIC>;
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};
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usb@51000 {
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compatible = "mrvl,usb-ehci", "usb-ehci";
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reg = <0x51000 0x1000>;
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interrupts = <72 17>;
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interrupt-parent = <&PIC>;
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};
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usb@52000 {
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compatible = "mrvl,usb-ehci", "usb-ehci";
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reg = <0x52000 0x1000>;
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interrupts = <72 18>;
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interrupt-parent = <&PIC>;
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};
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xor@60000 {
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compatible = "mrvl,xor";
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reg = <0x60000 0x1000>;
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interrupts = <22 23>;
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interrupt-parent = <&PIC>;
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};
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crypto@90000 {
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compatible = "mrvl,cesa";
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reg = <0x90000 0x1000 /* tdma base reg chan 0 */
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0x9D000 0x1000>; /* cesa base reg chan 0 */
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interrupts = <19>;
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interrupt-parent = <&PIC>;
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};
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sata@a0000 {
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compatible = "mrvl,sata";
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reg = <0xa0000 0x6000>;
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interrupts = <26>;
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interrupt-parent = <&PIC>;
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};
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};
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pci0: pcie@f1040000 {
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compatible = "mrvl,pcie";
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <0xf1040000 0x2000>;
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bus-range = <0 255>;
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ranges = <0x02000000 0x0 0xf2000000 0xf2000000 0x0 0x04000000
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0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
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clock-frequency = <33333333>;
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interrupt-parent = <&PIC>;
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interrupts = <68>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 0x1 */
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0x0800 0x0 0x0 0x1 &PIC 0x20
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0x0800 0x0 0x0 0x2 &PIC 0x21
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0x0800 0x0 0x0 0x3 &PIC 0x22
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0x0800 0x0 0x0 0x4 &PIC 0x23
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>;
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};
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sram@fd000000 {
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compatible = "mrvl,cesa-sram";
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reg = <0xfd000000 0x00100000>;
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};
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chosen {
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stdin = "serial0";
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stdout = "serial0";
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};
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};
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@ -1,223 +0,0 @@
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/*
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* Copyright (c) 2010 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Semihalf under sponsorship from
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* the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
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* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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*
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* Marvell DB-88F5182 Device Tree Source.
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*
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* $FreeBSD$
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*/
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/dts-v1/;
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/ {
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model = "mrvl,DB-88F5182";
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compatible = "DB-88F5182-BP", "DB-88F5182-BP-A";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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ethernet0 = &enet0;
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serial0 = &serial0;
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serial1 = &serial1;
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mpp = &MPP;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "ARM,88FR531";
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reg = <0x0>;
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d-cache-line-size = <32>; // 32 bytes
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i-cache-line-size = <32>; // 32 bytes
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d-cache-size = <0x8000>; // L1, 32K
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i-cache-size = <0x8000>; // L1, 32K
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timebase-frequency = <0>;
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bus-frequency = <0>;
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clock-frequency = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x08000000>; // 128M at 0x0
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};
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localbus@f1000000 {
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#address-cells = <2>;
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#size-cells = <1>;
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compatible = "mrvl,lbc";
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/* This reflects CPU decode windows setup. */
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ranges = <0x0 0x0f 0xf9300000 0x00100000
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0x1 0x1e 0xfa000000 0x00100000
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0x2 0x1d 0xfa100000 0x02000000>;
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nor@0,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x00100000>;
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bank-width = <2>;
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device-width = <1>;
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};
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led@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "led";
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reg = <0x1 0x0 0x00100000>;
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};
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nor@2,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash";
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reg = <0x2 0x0 0x02000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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};
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soc88f5182@f1000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges = <0x0 0xf1000000 0x00100000>;
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bus-frequency = <0>;
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PIC: pic@20200 {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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reg = <0x20200 0x3c>;
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compatible = "mrvl,pic";
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};
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timer@20300 {
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compatible = "mrvl,timer";
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reg = <0x20300 0x30>;
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interrupts = <0>;
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interrupt-parent = <&PIC>;
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mrvl,has-wdt;
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};
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MPP: mpp@10000 {
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#pin-cells = <2>;
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compatible = "mrvl,mpp";
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reg = <0x10000 0x54>;
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pin-count = <20>;
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pin-map = <
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0 3 /* MPP[0]: GPIO[0] */
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2 2 /* MPP[2]: PCI_REQn[3] */
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3 2 /* MPP[3]: PCI_GNTn[3] */
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4 2 /* MPP[4]: PCI_REQn[4] */
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5 2 /* MPP[5]: PCI_GNTn[4] */
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6 5 /* MPP[6]: SATA0_ACT */
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7 5 /* MPP[7]: SATA1_ACT */
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12 5 /* MPP[12]: SATA0_PRESENT */
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13 5 /* MPP[13]: SATA1_PRESENT */
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14 4 /* MPP[14]: NAND Flash REn[2] */
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15 4 /* MPP[15]: NAND Flash WEn[2] */
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16 0 /* MPP[16]: UA1_RXD */
|
||||
17 0 /* MPP[17]: UA1_TXD */
|
||||
18 0 /* MPP[18]: UA1_CTS */
|
||||
19 0 >; /* MPP[19]: UA1_RTS */
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <6 7 8 9>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V1";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <18 19 20 21 22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <3>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <4>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <17 16>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
idma@60000 {
|
||||
compatible = "mrvl,idma";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <24 25 26 27 23>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
compatible = "mrvl,sata";
|
||||
reg = <0x80000 0x6000>;
|
||||
interrupts = <29>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,227 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software was developed by Semihalf under sponsorship from
|
||||
* the FreeBSD Foundation.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Marvell DB-88F5281 Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "mrvl,DB-88F5281";
|
||||
compatible = "DB-88F5281-BP", "DB-88F5281-BP-A";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
mpp = &MPP;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR531";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x08000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
localbus@f1000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
|
||||
/* This reflects CPU decode windows setup. */
|
||||
ranges = <0x0 0x0f 0xf9300000 0x00100000
|
||||
0x1 0x1e 0xfa000000 0x00100000
|
||||
0x2 0x1d 0xfa100000 0x02000000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x00100000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
|
||||
led@1,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "led";
|
||||
reg = <0x1 0x0 0x00100000>;
|
||||
};
|
||||
|
||||
nor@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x2 0x0 0x02000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc88f5281@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <0>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x54>;
|
||||
pin-count = <20>;
|
||||
pin-map = <
|
||||
0 3 /* MPP[0]: GPIO[0] */
|
||||
2 2 /* MPP[2]: PCI_REQn[3] */
|
||||
3 2 /* MPP[3]: PCI_GNTn[3] */
|
||||
4 2 /* MPP[4]: PCI_REQn[4] */
|
||||
5 2 /* MPP[5]: PCI_GNTn[4] */
|
||||
6 3 /* MPP[6]: <UNKNOWN> */
|
||||
7 3 /* MPP[7]: <UNKNOWN> */
|
||||
8 3 /* MPP[8]: <UNKNOWN> */
|
||||
9 3 /* MPP[9]: <UNKNOWN> */
|
||||
14 4 /* MPP[14]: NAND Flash REn[2] */
|
||||
15 4 /* MPP[15]: NAND Flash WEn[2] */
|
||||
16 0 /* MPP[16]: UA1_RXD */
|
||||
17 0 /* MPP[17]: UA1_TXD */
|
||||
18 0 /* MPP[18]: UA1_CTS */
|
||||
19 0 >; /* MPP[19]: UA1_RTS */
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <6 7 8 9>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V1";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <18 19 20 21 22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <3>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <4>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <17 16>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
idma@60000 {
|
||||
compatible = "mrvl,idma";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <24 25 26 27 23>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,299 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2009-2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software was developed by Semihalf under sponsorship from
|
||||
* the FreeBSD Foundation.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Marvell DB-88F6281 Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "mrvl,DB-88F6281";
|
||||
compatible = "DB-88F6281-BP", "DB-88F6281-BP-A";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
mpp = &MPP;
|
||||
pci0 = &pci0;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
soc = &SOC;
|
||||
sram = &SRAM;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR131";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x20000000>; // 512M at 0x0
|
||||
};
|
||||
|
||||
localbus@0 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
bank-count = <3>;
|
||||
|
||||
/* This reflects CPU decode windows setup. */
|
||||
ranges = <0x0 0x2f 0xf9300000 0x00100000>;
|
||||
|
||||
nand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,nfc";
|
||||
reg = <0x0 0x0 0x00100000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
slice@0 {
|
||||
reg = <0x0 0x200000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
slice@200000 {
|
||||
reg = <0x200000 0x7e00000>;
|
||||
label = "root";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
SOC: soc88f6281@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x34>;
|
||||
pin-count = <50>;
|
||||
pin-map = <
|
||||
0 1 /* MPP[0]: NF_IO[2] */
|
||||
1 1 /* MPP[1]: NF_IO[3] */
|
||||
2 1 /* MPP[2]: NF_IO[4] */
|
||||
3 1 /* MPP[3]: NF_IO[5] */
|
||||
4 1 /* MPP[4]: NF_IO[6] */
|
||||
5 1 /* MPP[5]: NF_IO[7] */
|
||||
6 1 /* MPP[6]: SYSRST_OUTn */
|
||||
7 2 /* MPP[7]: SPI_SCn */
|
||||
8 1 /* MPP[8]: TW_SDA */
|
||||
9 1 /* MPP[9]: TW_SCK */
|
||||
10 3 /* MPP[10]: UA0_TXD */
|
||||
11 3 /* MPP[11]: UA0_RXD */
|
||||
12 1 /* MPP[12]: SD_CLK */
|
||||
13 1 /* MPP[13]: SD_CMD */
|
||||
14 1 /* MPP[14]: SD_D[0] */
|
||||
15 1 /* MPP[15]: SD_D[1] */
|
||||
16 1 /* MPP[16]: SD_D[2] */
|
||||
17 1 /* MPP[17]: SD_D[3] */
|
||||
18 1 /* MPP[18]: NF_IO[0] */
|
||||
19 1 /* MPP[19]: NF_IO[1] */
|
||||
20 5 /* MPP[20]: SATA1_AC */
|
||||
21 5 >; /* MPP[21]: SATA0_AC */
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <35 36 37 38 39 40 41>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
compatible = "mrvl,rtc";
|
||||
reg = <0x10300 0x08>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <12 13 14 11 46>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "mrvl,cesa";
|
||||
reg = <0x30000 0x1000 /* tdma base reg chan 0 */
|
||||
0x3D000 0x1000>; /* cesa base reg chan 0 */
|
||||
interrupts = <22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
sram-handle = <&SRAM>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <48 19>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
xor@60000 {
|
||||
compatible = "mrvl,xor";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <5 6 7 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
compatible = "mrvl,sata";
|
||||
reg = <0x80000 0x6000>;
|
||||
interrupts = <21>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
SRAM: sram@fd000000 {
|
||||
compatible = "mrvl,cesa-sram";
|
||||
reg = <0xfd000000 0x00100000>;
|
||||
};
|
||||
|
||||
pci0: pcie@f1040000 {
|
||||
compatible = "mrvl,pcie";
|
||||
device_type = "pci";
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <0xf1040000 0x2000>;
|
||||
bus-range = <0 255>;
|
||||
ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000
|
||||
0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>;
|
||||
clock-frequency = <33333333>;
|
||||
interrupt-parent = <&PIC>;
|
||||
interrupts = <44>;
|
||||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x1 */
|
||||
0x0800 0x0 0x0 0x1 &PIC 0x9
|
||||
0x0800 0x0 0x0 0x2 &PIC 0x9
|
||||
0x0800 0x0 0x0 0x3 &PIC 0x9
|
||||
0x0800 0x0 0x0 0x4 &PIC 0x9
|
||||
>;
|
||||
pcie@0 {
|
||||
reg = <0x0 0x0 0x0 0x0 0x0>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
ranges = <0x02000000 0x0 0xf1300000
|
||||
0x02000000 0x0 0xf1300000
|
||||
0x0 0x04000000
|
||||
|
||||
0x01000000 0x0 0x0
|
||||
0x01000000 0x0 0x0
|
||||
0x0 0x00100000>;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
};
|
||||
@ -1,241 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software was developed by Semihalf under sponsorship from
|
||||
* the FreeBSD Foundation.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Seagate DockStar (Marvell SheevaPlug based) Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "seagate,DockStar";
|
||||
compatible = "DockStar";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
mpp = &MPP;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
soc = &SOC;
|
||||
sram = &SRAM;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR131";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x8000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
localbus@f1000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
|
||||
/* This reflects CPU decode windows setup for NAND access. */
|
||||
ranges = <0x0 0x2f 0xf9300000 0x00100000>;
|
||||
|
||||
nand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,nfc";
|
||||
reg = <0x0 0x0 0x00100000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
SOC: soc88f6281@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x34>;
|
||||
pin-count = <50>;
|
||||
pin-map = <
|
||||
0 1 /* MPP[0]: NF_IO[2] */
|
||||
1 1 /* MPP[1]: NF_IO[3] */
|
||||
2 1 /* MPP[2]: NF_IO[4] */
|
||||
3 1 /* MPP[3]: NF_IO[5] */
|
||||
4 1 /* MPP[4]: NF_IO[6] */
|
||||
5 1 /* MPP[5]: NF_IO[7] */
|
||||
6 1 /* MPP[6]: SYSRST_OUTn */
|
||||
8 2 /* MPP[8]: UA0_RTS */
|
||||
9 2 /* MPP[9]: UA0_CTS */
|
||||
10 3 /* MPP[10]: UA0_TXD */
|
||||
11 3 /* MPP[11]: UA0_RXD */
|
||||
12 1 /* MPP[12]: SD_CLK */
|
||||
13 1 /* MPP[13]: SD_CMD */
|
||||
14 1 /* MPP[14]: SD_D[0] */
|
||||
15 1 /* MPP[15]: SD_D[1] */
|
||||
16 1 /* MPP[16]: SD_D[2] */
|
||||
17 1 /* MPP[17]: SD_D[3] */
|
||||
18 1 /* MPP[18]: NF_IO[0] */
|
||||
19 1 /* MPP[19]: NF_IO[1] */
|
||||
29 1 >; /* MPP[29]: TSMP[9] */
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <35 36 37 38 39 40 41>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
compatible = "mrvl,rtc";
|
||||
reg = <0x10300 0x08>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <12 13 14 11 46>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "mrvl,cesa";
|
||||
reg = <0x30000 0x1000 /* tdma base reg chan 0 */
|
||||
0x3D000 0x1000>; /* cesa base reg chan 0 */
|
||||
interrupts = <22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
sram-handle = <&SRAM>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <48 19>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
xor@60000 {
|
||||
compatible = "mrvl,xor";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <5 6 7 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
SRAM: sram@fd000000 {
|
||||
compatible = "mrvl,cesa-sram";
|
||||
reg = <0xfd000000 0x00100000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
};
|
||||
@ -1,320 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 Ian Lepore
|
||||
* Copyright (c) 2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software substantially based on work developed by Semihalf
|
||||
* under sponsorship from the FreeBSD Foundation.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* GlobalScale Technologies DreamPlug Device Tree Source.
|
||||
*
|
||||
* This source is for version 10 revision 01 units with NOR SPI flash.
|
||||
* These units are marked "1001" on the serial number label.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "GlobalScale Technologies Dreamplug v1001";
|
||||
compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
mpp = &MPP;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
soc = &SOC;
|
||||
sram = &SRAM;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR131";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x20000000>; // 512M at 0x0
|
||||
};
|
||||
|
||||
localbus@0 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
bank-count = <1>;
|
||||
|
||||
/* This reflects CPU decode windows setup. */
|
||||
ranges = <0x0 0x1e 0xfa000000 0x00100000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x00100000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
SOC: soc88f6281@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x34>;
|
||||
pin-count = <50>;
|
||||
pin-map = <
|
||||
0 2 /* MPP[ 0]: SPI_SCn */
|
||||
1 2 /* MPP[ 1]: SPI_MOSI */
|
||||
2 2 /* MPP[ 2]: SPI_SCK */
|
||||
3 2 /* MPP[ 3]: SPI_MISO */
|
||||
4 1 /* MPP[ 4]: NF_IO[6] */
|
||||
5 1 /* MPP[ 5]: NF_IO[7] */
|
||||
6 1 /* MPP[ 6]: SYSRST_OUTn */
|
||||
7 0 /* MPP[ 7]: GPO[7] */
|
||||
8 1 /* MPP[ 8]: TW_SDA */
|
||||
9 1 /* MPP[ 9]: TW_SCK */
|
||||
10 3 /* MPP[10]: UA0_TXD */
|
||||
11 3 /* MPP[11]: US0_RXD */
|
||||
12 1 /* MPP[12]: SD_CLK */
|
||||
13 1 /* MPP[13]: SD_CMD */
|
||||
14 1 /* MPP[14]: SD_D[0] */
|
||||
15 1 /* MPP[15]: SD_D[1] */
|
||||
16 1 /* MPP[16]: SD_D[2] */
|
||||
17 1 /* MPP[17]: SD_D[3] */
|
||||
18 1 /* MPP[18]: NF_IO[0] */
|
||||
19 1 /* MPP[19]: NF_IO[1] */
|
||||
20 3 /* MPP[20]: GE1[ 0] */
|
||||
21 3 /* MPP[21]: GE1[ 1] */
|
||||
22 3 /* MPP[22]: GE1[ 2] */
|
||||
23 3 /* MPP[23]: GE1[ 3] */
|
||||
24 3 /* MPP[24]: GE1[ 4] */
|
||||
25 3 /* MPP[25]: GE1[ 5] */
|
||||
26 3 /* MPP[26]: GE1[ 6] */
|
||||
27 3 /* MPP[27]: GE1[ 7] */
|
||||
28 3 /* MPP[28]: GE1[ 8] */
|
||||
29 3 /* MPP[29]: GE1[ 9] */
|
||||
30 3 /* MPP[30]: GE1[10] */
|
||||
31 3 /* MPP[31]: GE1[11] */
|
||||
32 3 /* MPP[32]: GE1[12] */
|
||||
33 3 /* MPP[33]: GE1[13] */
|
||||
34 3 /* MPP[34]: GE1[14] */
|
||||
35 3 /* MPP[35]: GE1[15] */
|
||||
36 0 /* MPP[36]: GPIO[36] */
|
||||
37 0 /* MPP[37]: GPIO[37] */
|
||||
38 0 /* MPP[38]: GPIO[38] */
|
||||
39 0 /* MPP[39]: GPIO[39] */
|
||||
40 2 /* MPP[40]: TDM_SPI_SCK */
|
||||
41 2 /* MPP[41]: TDM_SPI_MISO */
|
||||
42 2 /* MPP[42]: TDM_SPI_MOSI */
|
||||
43 0 /* MPP[43]: GPIO[43] */
|
||||
44 0 /* MPP[44]: GPIO[44] */
|
||||
45 0 /* MPP[45]: GPIO[45] */
|
||||
46 0 /* MPP[46]: GPIO[46] */
|
||||
47 0 /* MPP[47]: GPIO[47] */
|
||||
48 0 /* MPP[48]: GPIO[48] */
|
||||
49 0 /* MPP[49]: GPIO[49] */
|
||||
>;
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <3>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <35 36 37 38 39 40 41>;
|
||||
interrupt-parent = <&PIC>;
|
||||
pin-count = <50>;
|
||||
};
|
||||
|
||||
gpioled@0 {
|
||||
compatible = "mrvl,gpioled";
|
||||
|
||||
gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */
|
||||
&GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */
|
||||
&GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
compatible = "mrvl,rtc";
|
||||
reg = <0x10300 0x08>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <12 13 14 11 46>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@76000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x76000 0x02000>;
|
||||
ranges = <0x0 0x76000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <16 17 18 15 47>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "mrvl,cesa";
|
||||
reg = <0x30000 0x1000 /* tdma base reg chan 0 */
|
||||
0x3D000 0x1000>; /* cesa base reg chan 0 */
|
||||
interrupts = <22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
sram-handle = <&SRAM>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <48 19>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
xor@60000 {
|
||||
compatible = "mrvl,xor";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <5 6 7 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
compatible = "mrvl,sata";
|
||||
reg = <0x80000 0x6000>;
|
||||
interrupts = <21>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
sdio@90000 {
|
||||
compatible = "mrvl,sdio";
|
||||
reg = <0x90000 0x134>;
|
||||
interrupts = <28>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
SRAM: sram@fd000000 {
|
||||
compatible = "mrvl,cesa-sram";
|
||||
reg = <0xfd000000 0x00100000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
|
||||
};
|
||||
@ -1,341 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2013 Ian Lepore
|
||||
* Copyright (c) 2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software substantially based on work developed by Semihalf
|
||||
* under sponsorship from the FreeBSD Foundation.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* GlobalScale Technologies DreamPlug Device Tree Source.
|
||||
*
|
||||
* This source is for version 10 revision 01 units with NAND flash.
|
||||
* These units are marked "1001N" on the serial number label.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "GlobalScale Technologies Dreamplug v1001N";
|
||||
compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
ethernet1 = &enet1;
|
||||
mpp = &MPP;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
soc = &SOC;
|
||||
sram = &SRAM;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR131";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x20000000>; // 512M at 0x0
|
||||
};
|
||||
|
||||
localbus@0 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
bank-count = <1>;
|
||||
|
||||
/* This reflects CPU decode windows setup. */
|
||||
ranges = <0x0 0x2f 0xf9300000 0x00100000>;
|
||||
|
||||
nand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,nfc";
|
||||
reg = <0x0 0x0 0x00100000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
// Slice info reported by builtin linux when it boots...
|
||||
//[ 11.161328] 0x00000000-0x00100000 : "u-boot"
|
||||
//[ 11.167431] 0x00100000-0x00500000 : "uImage"
|
||||
//[ 11.173471] 0x00500000-0x20000000 : "root"
|
||||
|
||||
slice@0 {
|
||||
reg = <0x0 0x100000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
slice@200000 {
|
||||
reg = <0x100000 0x40000>;
|
||||
label = "uImage";
|
||||
};
|
||||
|
||||
slice@500000 {
|
||||
reg = <0x500000 0x1FB00000>;
|
||||
label = "root";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
SOC: soc88f6281@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x34>;
|
||||
pin-count = <50>;
|
||||
pin-map = <
|
||||
0 1 /* MPP[ 0]: NF_IO[2] */
|
||||
1 1 /* MPP[ 1]: NF_IO[3] */
|
||||
2 1 /* MPP[ 2]: NF_IO[4] */
|
||||
3 1 /* MPP[ 3]: NF_IO[5] */
|
||||
4 1 /* MPP[ 4]: NF_IO[6] */
|
||||
5 1 /* MPP[ 5]: NF_IO[7] */
|
||||
6 1 /* MPP[ 6]: SYSRST_OUTn */
|
||||
7 0 /* MPP[ 7]: GPO[7] */
|
||||
8 1 /* MPP[ 8]: TW_SDA */
|
||||
9 1 /* MPP[ 9]: TW_SCK */
|
||||
10 3 /* MPP[10]: UA0_TXD */
|
||||
11 3 /* MPP[11]: US0_RXD */
|
||||
12 1 /* MPP[12]: SD_CLK */
|
||||
13 1 /* MPP[13]: SD_CMD */
|
||||
14 1 /* MPP[14]: SD_D[0] */
|
||||
15 1 /* MPP[15]: SD_D[1] */
|
||||
16 1 /* MPP[16]: SD_D[2] */
|
||||
17 1 /* MPP[17]: SD_D[3] */
|
||||
18 1 /* MPP[18]: NF_IO[0] */
|
||||
19 1 /* MPP[19]: NF_IO[1] */
|
||||
20 3 /* MPP[20]: GE1[ 0] */
|
||||
21 3 /* MPP[21]: GE1[ 1] */
|
||||
22 3 /* MPP[22]: GE1[ 2] */
|
||||
23 3 /* MPP[23]: GE1[ 3] */
|
||||
24 3 /* MPP[24]: GE1[ 4] */
|
||||
25 3 /* MPP[25]: GE1[ 5] */
|
||||
26 3 /* MPP[26]: GE1[ 6] */
|
||||
27 3 /* MPP[27]: GE1[ 7] */
|
||||
28 3 /* MPP[28]: GE1[ 8] */
|
||||
29 3 /* MPP[29]: GE1[ 9] */
|
||||
30 3 /* MPP[30]: GE1[10] */
|
||||
31 3 /* MPP[31]: GE1[11] */
|
||||
32 3 /* MPP[32]: GE1[12] */
|
||||
33 3 /* MPP[33]: GE1[13] */
|
||||
34 3 /* MPP[34]: GE1[14] */
|
||||
35 3 /* MPP[35]: GE1[15] */
|
||||
36 0 /* MPP[36]: GPIO[36] */
|
||||
37 0 /* MPP[37]: GPIO[37] */
|
||||
38 0 /* MPP[38]: GPIO[38] */
|
||||
39 0 /* MPP[39]: GPIO[39] */
|
||||
40 2 /* MPP[40]: TDM_SPI_SCK */
|
||||
41 2 /* MPP[41]: TDM_SPI_MISO */
|
||||
42 2 /* MPP[42]: TDM_SPI_MOSI */
|
||||
43 0 /* MPP[43]: GPIO[43] */
|
||||
44 0 /* MPP[44]: GPIO[44] */
|
||||
45 0 /* MPP[45]: GPIO[45] */
|
||||
46 0 /* MPP[46]: GPIO[46] */
|
||||
47 0 /* MPP[47]: GPIO[47] */
|
||||
48 0 /* MPP[48]: GPIO[48] */
|
||||
49 0 /* MPP[49]: GPIO[49] */
|
||||
>;
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <3>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <35 36 37 38 39 40 41>;
|
||||
interrupt-parent = <&PIC>;
|
||||
pin-count = <50>;
|
||||
};
|
||||
|
||||
gpioled@0 {
|
||||
compatible = "mrvl,gpioled";
|
||||
|
||||
gpios = <&GPIO 47 2 0 /* GPIO[47] BT LED: OUT */
|
||||
&GPIO 48 2 0 /* GPIO[48] WLAN LED: OUT */
|
||||
&GPIO 49 2 0>; /* GPIO[49] WLAN AP LED: OUT */
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
compatible = "mrvl,rtc";
|
||||
reg = <0x10300 0x08>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <12 13 14 11 46>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@1 {
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@76000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x76000 0x02000>;
|
||||
ranges = <0x0 0x76000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <16 17 18 15 47>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy1>;
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "mrvl,cesa";
|
||||
reg = <0x30000 0x1000 /* tdma base reg chan 0 */
|
||||
0x3D000 0x1000>; /* cesa base reg chan 0 */
|
||||
interrupts = <22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
sram-handle = <&SRAM>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <48 19>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
xor@60000 {
|
||||
compatible = "mrvl,xor";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <5 6 7 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
compatible = "mrvl,sata";
|
||||
reg = <0x80000 0x6000>;
|
||||
interrupts = <21>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
sdio@90000 {
|
||||
compatible = "mrvl,sdio";
|
||||
reg = <0x90000 0x134>;
|
||||
interrupts = <28>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
SRAM: sram@fd000000 {
|
||||
compatible = "mrvl,cesa-sram";
|
||||
reg = <0xfd000000 0x00100000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
|
||||
};
|
||||
@ -1,270 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2011 Jakub Klama <jceel@FreeBSD.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Embedded Artists LPC3250-Kit Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "ea,LPC3250-KIT";
|
||||
compatible = "LPC3250-KIT";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
soc = &soc;
|
||||
serial4 = &serial4;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,926EJ-S";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x4000000>; // 64M at 0x80000000
|
||||
};
|
||||
|
||||
soc: ahb7@40000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x40000000 0x10000000>;
|
||||
bus-frequency = <13000000>;
|
||||
|
||||
pwr@4000 {
|
||||
compatible = "lpc,pwr";
|
||||
reg = <0x4000 0x4000>;
|
||||
};
|
||||
|
||||
PIC: pic@8000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x8000 0xc000>;
|
||||
compatible = "lpc,pic";
|
||||
};
|
||||
|
||||
timer@44000 {
|
||||
compatible = "lpc,timer";
|
||||
reg = <0x44000 0x4000
|
||||
0x4c000 0x4000>;
|
||||
interrupts = <16 17>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
rtc@24000 {
|
||||
compatible = "lpc,rtc";
|
||||
reg = <0x24000 0x4000>;
|
||||
interrupts = <52>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial0: serial@14000 {
|
||||
compatible = "lpc,hsuart";
|
||||
status = "disabled";
|
||||
reg = <0x14000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <26>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@18000 {
|
||||
compatible = "lpc,hsuart";
|
||||
status = "disabled";
|
||||
reg = <0x18000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <25>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial2: serial@80000 {
|
||||
compatible = "lpc,uart";
|
||||
status = "disabled";
|
||||
reg = <0x80000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <13000000>;
|
||||
interrupts = <7>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial3: serial@88000 {
|
||||
compatible = "lpc,uart";
|
||||
status = "disabled";
|
||||
reg = <0x88000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <13000000>;
|
||||
interrupts = <8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial4: serial@90000 {
|
||||
compatible = "lpc,uart";
|
||||
reg = <0x90000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <13000000>;
|
||||
current-speed = <115200>;
|
||||
interrupts = <9>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial5: serial@98000 {
|
||||
compatible = "lpc,uart";
|
||||
status = "disabled";
|
||||
reg = <0x98000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <13000000>;
|
||||
interrupts = <10>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial6: serial@1c000 {
|
||||
compatible = "lpc,uart";
|
||||
status = "disabled";
|
||||
reg = <0x1c000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <24>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
gpio@28000 {
|
||||
compatible = "lpc,gpio";
|
||||
reg = <0x28000 0x4000>;
|
||||
};
|
||||
};
|
||||
|
||||
ahb6@30000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x30000000 0x10000000>;
|
||||
|
||||
dmac@1000000 {
|
||||
compatible = "lpc,dmac";
|
||||
reg = <0x1000000 0x20000>;
|
||||
interrupts = <28>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
usb@1020000 {
|
||||
compatible = "lpc,usb-ohci", "usb-ohci";
|
||||
reg = <0x1020000 0x20000>;
|
||||
interrupts = <59>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
lpcfb@1040000 {
|
||||
compatible = "lpc,fb";
|
||||
reg = <0x1040000 0x20000>;
|
||||
interrupts = <14>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
/* Screen parameters: */
|
||||
is-tft = <1>;
|
||||
horizontal-resolution = <240>;
|
||||
vertical-resolution = <320>;
|
||||
bits-per-pixel = <16>;
|
||||
pixel-clock = <121654>;
|
||||
left-margin = <28>;
|
||||
right-margin = <10>;
|
||||
upper-margin = <2>;
|
||||
lower-margin = <2>;
|
||||
hsync-len = <3>;
|
||||
vsync-len = <2>;
|
||||
};
|
||||
|
||||
lpe@1060000 {
|
||||
compatible = "lpc,ethernet";
|
||||
reg = <0x1060000 0x20000>;
|
||||
interrupts = <29>;
|
||||
interrupt-parent = <&PIC>;
|
||||
local-mac-address = [ 00 1a f1 01 1f 23 ];
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "lpc,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
ahb5@20000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x20000000 0x10000000>;
|
||||
|
||||
spi0@84000 {
|
||||
compatible = "lpc,spi";
|
||||
reg = <0x84000 0x4000>;
|
||||
interrupts = <20>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
spi1@8c000 {
|
||||
compatible = "lpc,spi";
|
||||
status = "disabled";
|
||||
reg = <0x8c000 0x4000>;
|
||||
interrupts = <21>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
lpcmmc@98000 {
|
||||
compatible = "lpc,mmc";
|
||||
reg = <0x98000 0x4000>;
|
||||
interrupts = <15 13>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial4";
|
||||
stdout = "serial4";
|
||||
};
|
||||
};
|
||||
@ -1,159 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2011 Jakub Klama <jceel@FreeBSD.org>
|
||||
* Copyright (c) 2015 Hiroki Mori
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Ralink RT1310A Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/ {
|
||||
compatible = "ralink,rt1310a-soc";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,926EJ-S";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x40000000 0x1000000>; // 16M at 0x40000000
|
||||
};
|
||||
|
||||
localbus@1f000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x1f000000 0x400000>;
|
||||
};
|
||||
|
||||
ahb@19C00000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x19C00000 0xE0000>;
|
||||
bus-frequency = <13000000>;
|
||||
|
||||
PIC: pic@40000 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x40000 0x20000>;
|
||||
compatible = "rt,pic";
|
||||
};
|
||||
|
||||
fvmdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fv,mdio";
|
||||
reg = <0x80000 0x20000>;
|
||||
};
|
||||
|
||||
enet0:fv_mac0@80000 {
|
||||
compatible = "fv,ethernet";
|
||||
reg = <0x80000 0x20000>;
|
||||
interrupts = <7>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
};
|
||||
|
||||
enet1:fv_mac1@A0000 {
|
||||
compatible = "fv,ethernet";
|
||||
reg = <0xA0000 0x20000>;
|
||||
interrupts = <8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
apb@1E800000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0x1E800000 0x800000>;
|
||||
bus-frequency = <75000000>;
|
||||
|
||||
timer@000000 {
|
||||
compatible = "rt,timer";
|
||||
reg = <0x0 0x10
|
||||
0x10 0x10
|
||||
0x20 0x10
|
||||
0x30 0x10>;
|
||||
interrupts = <3 4 5>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
rtc@20000 {
|
||||
compatible = "rt,rtc";
|
||||
interrupts = <6>;
|
||||
reg = <0x20000 0x20000>;
|
||||
};
|
||||
|
||||
serial0: serial@40000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x40000 0x20000>;
|
||||
interrupts = <1>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <6758400>;
|
||||
current-speed = <38400>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
gpio0: gpio@A0000 {
|
||||
compatible = "ralink,rt1310-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupts = <8>;
|
||||
reg = <0xA0000 0x20000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
/*
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
*/
|
||||
};
|
||||
|
||||
@ -1,253 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software was developed by Semihalf under sponsorship from
|
||||
* the FreeBSD Foundation.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Marvell SheevaPlug Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "mrvl,SheevaPlug";
|
||||
compatible = "SheevaPlug";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &enet0;
|
||||
mpp = &MPP;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
soc = &SOC;
|
||||
sram = &SRAM;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR131";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x4000>; // L1, 16K
|
||||
i-cache-size = <0x4000>; // L1, 16K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x20000000>; // 512M at 0x0
|
||||
};
|
||||
|
||||
localbus@0 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
bank-count = <3>;
|
||||
|
||||
/* This reflects CPU decode windows setup. */
|
||||
ranges = <0x0 0x2f 0xf9300000 0x00100000>;
|
||||
|
||||
nand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,nfc";
|
||||
reg = <0x0 0x0 0x00100000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
|
||||
slice@0 {
|
||||
reg = <0x0 0x200000>;
|
||||
label = "u-boot";
|
||||
read-only;
|
||||
};
|
||||
|
||||
slice@200000 {
|
||||
reg = <0x200000 0x1fe00000>;
|
||||
label = "root";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
SOC: soc88f6281@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x34>;
|
||||
pin-count = <50>;
|
||||
pin-map = <
|
||||
0 1 /* MPP[0]: NF_IO[2] */
|
||||
1 1 /* MPP[1]: NF_IO[3] */
|
||||
2 1 /* MPP[2]: NF_IO[4] */
|
||||
3 1 /* MPP[3]: NF_IO[5] */
|
||||
4 1 /* MPP[4]: NF_IO[6] */
|
||||
5 1 /* MPP[5]: NF_IO[7] */
|
||||
6 1 /* MPP[6]: SYSRST_OUTn */
|
||||
8 2 /* MPP[8]: UA0_RTS */
|
||||
9 2 /* MPP[9]: UA0_CTS */
|
||||
10 3 /* MPP[10]: UA0_TXD */
|
||||
11 3 /* MPP[11]: UA0_RXD */
|
||||
12 1 /* MPP[12]: SD_CLK */
|
||||
13 1 /* MPP[13]: SD_CMD */
|
||||
14 1 /* MPP[14]: SD_D[0] */
|
||||
15 1 /* MPP[15]: SD_D[1] */
|
||||
16 1 /* MPP[16]: SD_D[2] */
|
||||
17 1 /* MPP[17]: SD_D[3] */
|
||||
18 1 /* MPP[18]: NF_IO[0] */
|
||||
19 1 /* MPP[19]: NF_IO[1] */
|
||||
29 1 >; /* MPP[29]: TSMP[9] */
|
||||
};
|
||||
|
||||
GPIO: gpio@10100 {
|
||||
#gpio-cells = <2>;
|
||||
compatible = "mrvl,gpio";
|
||||
reg = <0x10100 0x20>;
|
||||
gpio-controller;
|
||||
interrupts = <35 36 37 38 39 40 41>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
rtc@10300 {
|
||||
compatible = "mrvl,rtc";
|
||||
reg = <0x10300 0x08>;
|
||||
};
|
||||
|
||||
twsi@11000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,twsi";
|
||||
reg = <0x11000 0x20>;
|
||||
interrupts = <43>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
enet0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V2";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <12 13 14 11 46>;
|
||||
interrupt-parent = <&PIC>;
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <33>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <34>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "mrvl,cesa";
|
||||
reg = <0x30000 0x1000 /* tdma base reg chan 0 */
|
||||
0x3D000 0x1000>; /* cesa base reg chan 0 */
|
||||
interrupts = <22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
sram-handle = <&SRAM>;
|
||||
};
|
||||
|
||||
usb@50000 {
|
||||
compatible = "mrvl,usb-ehci", "usb-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <48 19>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
xor@60000 {
|
||||
compatible = "mrvl,xor";
|
||||
reg = <0x60000 0x1000>;
|
||||
interrupts = <5 6 7 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
SRAM: sram@fd000000 {
|
||||
compatible = "mrvl,cesa-sram";
|
||||
reg = <0xfd000000 0x00100000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
};
|
||||
@ -1,161 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2010 The FreeBSD Foundation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Technologic Systems TS-7800 Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "mrvl,TS-7800";
|
||||
compatible = "DB-88F5182-BP", "DB-88F5182-BP-A";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = &mge0;
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
mpp = &MPP;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "ARM,88FR531";
|
||||
reg = <0x0>;
|
||||
d-cache-line-size = <32>; // 32 bytes
|
||||
i-cache-line-size = <32>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x08000000>; // 128M at 0x0
|
||||
};
|
||||
|
||||
localbus@f1000000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "mrvl,lbc";
|
||||
|
||||
/* This reflects CPU decode windows setup. */
|
||||
ranges = <0x0 0x0f 0xf9300000 0x00100000
|
||||
0x1 0x1e 0xfa000000 0x00100000
|
||||
0x2 0x1d 0xfa100000 0x02000000>;
|
||||
};
|
||||
|
||||
soc88f5182@f1000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x0 0xf1000000 0x00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
PIC: pic@20200 {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <0x20200 0x3c>;
|
||||
compatible = "mrvl,pic";
|
||||
};
|
||||
|
||||
timer@20300 {
|
||||
compatible = "mrvl,timer";
|
||||
reg = <0x20300 0x30>;
|
||||
interrupts = <0>;
|
||||
interrupt-parent = <&PIC>;
|
||||
mrvl,has-wdt;
|
||||
};
|
||||
|
||||
MPP: mpp@10000 {
|
||||
#pin-cells = <2>;
|
||||
compatible = "mrvl,mpp";
|
||||
reg = <0x10000 0x54>;
|
||||
pin-count = <20>;
|
||||
pin-map = <
|
||||
16 0 /* MPP[16]: UA1_RXD */
|
||||
17 0 /* MPP[17]: UA1_TXD */
|
||||
19 0 >; /* MPP[19]: UA1_RTS */
|
||||
};
|
||||
|
||||
mge0: ethernet@72000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
model = "V1";
|
||||
compatible = "mrvl,ge";
|
||||
reg = <0x72000 0x2000>;
|
||||
ranges = <0x0 0x72000 0x2000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <18 19 20 21 22>;
|
||||
interrupt-parent = <&PIC>;
|
||||
|
||||
phy-handle = <&phy0>;
|
||||
|
||||
mdio@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "mrvl,mdio";
|
||||
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@12000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12000 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <3>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
|
||||
serial1: serial@12100 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x12100 0x20>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <4>;
|
||||
interrupt-parent = <&PIC>;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "serial0";
|
||||
stdout = "serial0";
|
||||
};
|
||||
};
|
||||
@ -1,309 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2013-2015 John Wehle <john@feith.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* The ordering of certain devices is significant (e.g. usb depends on
|
||||
* usb-phy which depends on gpio, also the timer should appear early on
|
||||
* to provide a reasonably accurate DELAY implementation).
|
||||
*
|
||||
* Both usb-phys devices must be configured to prevent the usb controller
|
||||
* from hanging during initialization.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */
|
||||
|
||||
#include "meson6.dtsi"
|
||||
|
||||
/ {
|
||||
/*
|
||||
* My development unit visually appears to be a Visson ATV-102
|
||||
* and the specs for both my unit and the Visson ATV-102 say
|
||||
* the SoC is an aml8726-m3. However the uboot prompt says
|
||||
* m6_mbx_v1, the RTC is located on SECBUS2 instead of AOBUS,
|
||||
* and there are two cores so it seems my unit is a newer
|
||||
* version using the later processor.
|
||||
*/
|
||||
|
||||
model = "visson,atv-102";
|
||||
compatible = "visson,atv-102", "amlogic,meson6";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
soc = &soc;
|
||||
screen = &screen;
|
||||
uart0 = &uart_AO;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1GB RAM */
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
device_type = "soc";
|
||||
bus-frequency = <0>;
|
||||
|
||||
pic: pic@c1109a40 {
|
||||
device_type = "interrupt-controller";
|
||||
compatible = "amlogic,aml8726-pic";
|
||||
reg = <0xc1109a40 128>; /* cbus 0x2690 */
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
scu: scu@c4300000 {
|
||||
compatible = "arm,cortex-a9-scu";
|
||||
reg = <0xc4300000 0x1000>;
|
||||
};
|
||||
|
||||
cpuconfig: cpuconfig@d901ff80 {
|
||||
compatible = "amlogic,aml8726-cpuconfig";
|
||||
reg = <0xd901ff80 8>;
|
||||
};
|
||||
|
||||
ccm@c1104140 {
|
||||
compatible = "amlogic,aml8726-ccm";
|
||||
reg = <0xc1104140 20>; /* cbus 0x1050 */
|
||||
|
||||
functions = "ethernet", "i2c", "rng", "sdio",
|
||||
"uart-a", "uart-b", "uart-c",
|
||||
"usb-a", "usb-b";
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@c11080b0 {
|
||||
compatible = "amlogic,aml8726-pinctrl";
|
||||
reg = <0xc11080b0 40>, /* mux */
|
||||
<0xc11080e8 24>, /* pu/pd */
|
||||
<0xc11080e8 24>, /* pull enable */
|
||||
<0xc8100014 4>, /* ao mux */
|
||||
<0xc810002c 4>, /* ao pu/pd */
|
||||
<0xc810002c 4>; /* ao pull enable */
|
||||
|
||||
/*
|
||||
* Currently only pin muxing that deviates
|
||||
* from the power on default of gpio is
|
||||
* specified here.
|
||||
*/
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>;
|
||||
|
||||
pins_ethernet: ethernet {
|
||||
amlogic,pins = "ref_clk_in",
|
||||
"tx_clk", "tx_en",
|
||||
"tx_d0", "tx_d1",
|
||||
"tx_d2", "tx_d3",
|
||||
"rx_clk", "rx_dv",
|
||||
"rx_d0", "rx_d1",
|
||||
"rx_d2", "rx_d3",
|
||||
"mdc", "mdio";
|
||||
amlogic,function = "ethernet";
|
||||
};
|
||||
|
||||
pins_hdmi: hdmi {
|
||||
amlogic,pins = "cec", "hpd",
|
||||
"scl", "sda";
|
||||
amlogic,function = "hdmi";
|
||||
};
|
||||
|
||||
pins_sdio_b: sdio_b {
|
||||
amlogic,pins = "clk", "cmd",
|
||||
"d0", "d1",
|
||||
"d2", "d3";
|
||||
amlogic,function = "sdio-b";
|
||||
};
|
||||
|
||||
pins_uartao: uartao {
|
||||
amlogic,pins = "tx", "rx";
|
||||
amlogic,function = "uart-ao";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@da004340 {
|
||||
compatible = "amlogic,aml8726-rtc";
|
||||
reg = <0xda004340 20>; /* secbus2 0xd0 */
|
||||
interrupts = <0 72 1>; /* AM_IRQ2(8) */
|
||||
};
|
||||
|
||||
clkmsr: clkmsr@c1108758 {
|
||||
compatible = "amlogic,aml8726-clkmsr";
|
||||
reg = <0xc1108758 16>; /* cbus 0x21d6 */
|
||||
|
||||
clocks = <&clk81>;
|
||||
};
|
||||
|
||||
gpioao: gpio@c8100024 {
|
||||
/* gpio unit 7 */
|
||||
compatible = "amlogic,aml8726-gpio";
|
||||
reg = <0xc8100024 4>, /* oen aobus 0x9 */
|
||||
<0xc8100024 4>, /* out */
|
||||
<0xc8100028 4>; /* in */
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <1>;
|
||||
pin-count = <12>;
|
||||
};
|
||||
|
||||
gpio5: gpio@c110806c {
|
||||
compatible = "amlogic,aml8726-gpio";
|
||||
reg = <0xc110806c 4>, /* oen cbus 0x201b */
|
||||
<0xc1108070 4>, /* out */
|
||||
<0xc1108074 4>; /* in */
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <1>;
|
||||
pin-count = <32>;
|
||||
};
|
||||
|
||||
gpio6: gpio@c1108020 {
|
||||
compatible = "amlogic,aml8726-gpio";
|
||||
reg = <0xc1108020 4>, /* oen cbus 0x2008 */
|
||||
<0xc1108024 4>, /* out */
|
||||
<0xc1108028 4>; /* in */
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <1>;
|
||||
pin-count = <29>;
|
||||
};
|
||||
|
||||
mmc@c1108c20 {
|
||||
compatible = "amlogic,aml8726-mmc";
|
||||
reg = <0xc1108c20 32>; /* cbus 0x2308 */
|
||||
interrupts = <0 28 1>; /* AM_IRQ0(28) */
|
||||
|
||||
clocks = <&clk81>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pins_sdio_b>;
|
||||
|
||||
mmc-voltages = "3.3";
|
||||
|
||||
mmc-pwr-en = <&gpio5 31 0>; /* card_8 */
|
||||
ins-detect = <&gpio5 29 0>; /* card_6 */
|
||||
};
|
||||
|
||||
rng@c1108100 {
|
||||
compatible = "amlogic,aml8726-rng";
|
||||
reg = <0xc1108100 8>; /* cbus 0x2040 */
|
||||
};
|
||||
|
||||
usb-phy@c1108400 {
|
||||
/* usb-a phy */
|
||||
compatible = "amlogic,aml8726-m6-usb-phy";
|
||||
reg = <0xc1108400 32>; /* cbus 0x2100 */
|
||||
};
|
||||
|
||||
usb-phy@c1108420 {
|
||||
/* usb-b phy */
|
||||
compatible = "amlogic,aml8726-m6-usb-phy";
|
||||
reg = <0xc1108420 32>; /* cbus 0x2108 */
|
||||
|
||||
usb-pwr-en = <&gpioao 3 1>, /* gpioao_3 vbus */
|
||||
<&gpio6 11 0>; /* gpioe_11 wifi */
|
||||
};
|
||||
|
||||
usb@c9040000 {
|
||||
/* usb-a */
|
||||
compatible = "synopsys,designware-hs-otg2";
|
||||
reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/
|
||||
interrupts = <0 30 4>; /* AM_IRQ0(30) */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
usb@c90c0000 {
|
||||
/* usb-b */
|
||||
compatible = "synopsys,designware-hs-otg2";
|
||||
reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */
|
||||
interrupts = <0 31 4>; /* AM_IRQ0(31) */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
eth@c9410000 {
|
||||
/* ethernet */
|
||||
compatible = "snps,dwmac";
|
||||
reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */
|
||||
interrupts = <0 8 1>; /* AM_IRQ0(8) */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
eth-phy-rst = <&gpio5 15 0>; /* gpioy_15 phy-rst */
|
||||
};
|
||||
|
||||
screen: fb@c8006324 {
|
||||
device_type = "display";
|
||||
compatible = "amlogic,aml8726-fb";
|
||||
reg = <0xc8006324 12>, /* CANVAS */
|
||||
<0xc1106800 1024>, /* VIU */
|
||||
<0xc1107400 1024>; /* VPP */
|
||||
interrupts = <0 2 1>, /* AM_IRQ0(2) */
|
||||
<0 3 1>, /* AM_IRQ0(3) */
|
||||
<0 12 1>, /* AM_IRQ0(12) */
|
||||
<0 13 1>; /* AM_IRQ0(13) */
|
||||
|
||||
address = <0x84900000>; /* match memreserve */
|
||||
width = <720>;
|
||||
height = <480>;
|
||||
depth = <24>;
|
||||
linebytes = <2160>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
sys_led {
|
||||
gpios = <&gpioao 2>; /* gpioao_2 sys_led */
|
||||
label = "sys_led";
|
||||
|
||||
default-state = "on";
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "uart0";
|
||||
stdout = "uart0";
|
||||
};
|
||||
};
|
||||
|
||||
&clk81 {
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
@ -1,92 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2015 Hiroki Mori
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* Buffalo WZR2-G300N Device Tree Source.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rt1310a.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "WZR2-G300N", "ralink,rt1310a-soc";
|
||||
model = "WZR2-G300N";
|
||||
|
||||
flash@1f000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x1f000000 0x400000>; // 4M at 0x1f000000
|
||||
|
||||
partition@0 {
|
||||
reg = <0x00000000 0x0000e000>;
|
||||
label = "uboot";
|
||||
};
|
||||
partition@1 {
|
||||
reg = <0x0000e000 0x00002000>;
|
||||
label = "uboot_env";
|
||||
};
|
||||
partition@2 {
|
||||
reg = <0x00010000 0x000f0000>;
|
||||
label = "kernel";
|
||||
};
|
||||
partition@3 {
|
||||
reg = <0x00100000 0x002d0000>;
|
||||
label = "rootfs";
|
||||
};
|
||||
partition@4 {
|
||||
reg = <0x003d0000 0x00010000>;
|
||||
label = "config";
|
||||
};
|
||||
partition@5 {
|
||||
reg = <0x00010000 0x003c0000>;
|
||||
label = "upgrade";
|
||||
};
|
||||
};
|
||||
|
||||
gpio-leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
status {
|
||||
label = "status";
|
||||
gpios = <&gpio0 4 0>;
|
||||
};
|
||||
};
|
||||
|
||||
ip17x@0 {
|
||||
compatible = "icplus,ip17x";
|
||||
mii-poll = <0>;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&enet0 {
|
||||
local-mac-address = [ 00 1a f1 01 1f 23 ];
|
||||
};
|
||||
|
||||
&enet1 {
|
||||
local-mac-address = [ 00 1a f1 01 1f 24 ];
|
||||
};
|
||||
@ -1,237 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2015 John Wehle <john@feith.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
/*
|
||||
* The ordering of certain devices is significant (e.g. usb depends on
|
||||
* usb-phy which depends on gpio, also the timer should appear early on
|
||||
* to provide a reasonably accurate DELAY implementation).
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/memreserve/ 0x84900000 0x00600000; /* 6MB frame buffer */
|
||||
|
||||
#include "meson3.dtsi"
|
||||
|
||||
/ {
|
||||
/*
|
||||
* My development unit is a Yiyate Android TV Box containing
|
||||
* a HD18 motherboard and an aml8726-m3 SoC ... later versions
|
||||
* shipped with an aml8726-m6. Printenv in uboot shows m3-oplay
|
||||
* as the boardname supplied as part of mmcargs.
|
||||
*/
|
||||
|
||||
model = "yiyate,hd18-m3";
|
||||
compatible = "yiyate,hd18-m3", "amlogic,meson3";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
soc = &soc;
|
||||
screen = &screen;
|
||||
uart0 = &uart_AO;
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x40000000>; /* 1GB RAM */
|
||||
};
|
||||
|
||||
soc: soc {
|
||||
device_type = "soc";
|
||||
bus-frequency = <0>;
|
||||
|
||||
ccm@c1104140 {
|
||||
compatible = "amlogic,aml8726-ccm";
|
||||
reg = <0xc1104140 20>; /* cbus 0x1050 */
|
||||
|
||||
functions = "ethernet", "i2c", "rng", "sdio",
|
||||
"uart-a", "uart-b", "uart-c",
|
||||
"usb-a", "usb-b";
|
||||
};
|
||||
|
||||
pinctrl: pinctrl@c11080b0 {
|
||||
compatible = "amlogic,aml8726-pinctrl";
|
||||
reg = <0xc11080b0 40>, /* mux */
|
||||
<0xc11080e8 24>, /* pu/pd */
|
||||
<0xc11080e8 24>, /* pull enable */
|
||||
<0xc8100014 4>, /* ao mux */
|
||||
<0xc810002c 4>, /* ao pu/pd */
|
||||
<0xc810002c 4>; /* ao pull enable */
|
||||
|
||||
/*
|
||||
* Currently only pin muxing that deviates
|
||||
* from the power on default of gpio is
|
||||
* specified here.
|
||||
*/
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pins_uartao &pins_ethernet &pins_hdmi>;
|
||||
|
||||
pins_ethernet: ethernet {
|
||||
amlogic,pins = "clk_out", "tx_en",
|
||||
"tx_d0", "tx_d1",
|
||||
"crs_dv", "rx_err",
|
||||
"rx_d0", "rx_d1",
|
||||
"mdc", "mdio";
|
||||
amlogic,function = "ethernet";
|
||||
};
|
||||
|
||||
pins_hdmi: hdmi {
|
||||
amlogic,pins = "cec", "hpd",
|
||||
"scl", "sda";
|
||||
amlogic,function = "hdmi";
|
||||
};
|
||||
|
||||
pins_sdio_b: sdio_b {
|
||||
amlogic,pins = "clk", "cmd",
|
||||
"d0", "d1",
|
||||
"d2", "d3";
|
||||
amlogic,function = "sdio-b";
|
||||
};
|
||||
|
||||
pins_uartao: uartao {
|
||||
amlogic,pins = "tx", "rx";
|
||||
amlogic,function = "uart-ao";
|
||||
};
|
||||
};
|
||||
|
||||
rtc@c8100740 {
|
||||
compatible = "amlogic,aml8726-rtc";
|
||||
reg = <0xc8100740 20>; /* aobus 0x1d0 */
|
||||
interrupts = <0 72 1>; /* AM_IRQ2(8) */
|
||||
};
|
||||
|
||||
clkmsr: clkmsr@c1108758 {
|
||||
compatible = "amlogic,aml8726-clkmsr";
|
||||
reg = <0xc1108758 16>; /* cbus 0x21d6 */
|
||||
|
||||
clocks = <&clk81>;
|
||||
};
|
||||
|
||||
gpio5: gpio@c110806c {
|
||||
compatible = "amlogic,aml8726-gpio";
|
||||
reg = <0xc110806c 4>, /* oen cbus 0x201b */
|
||||
<0xc1108070 4>, /* out */
|
||||
<0xc1108074 4>; /* in */
|
||||
|
||||
gpio-controller;
|
||||
#gpio-cells = <1>;
|
||||
pin-count = <32>;
|
||||
};
|
||||
|
||||
mmc@c1108c20 {
|
||||
compatible = "amlogic,aml8726-mmc";
|
||||
reg = <0xc1108c20 32>; /* cbus 0x2308 */
|
||||
interrupts = <0 28 1>; /* AM_IRQ0(28) */
|
||||
|
||||
clocks = <&clk81>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pins_sdio_b>;
|
||||
|
||||
mmc-voltages = "3.3";
|
||||
|
||||
mmc-pwr-en = <&gpio5 31 0>; /* card_8 */
|
||||
ins-detect = <&gpio5 29 0>; /* card_6 */
|
||||
};
|
||||
|
||||
rng@c1108100 {
|
||||
compatible = "amlogic,aml8726-rng";
|
||||
reg = <0xc1108100 8>; /* cbus 0x2040 */
|
||||
};
|
||||
|
||||
usb-phy@c1108400 {
|
||||
/* usb-a and usb-b phy */
|
||||
compatible = "amlogic,aml8726-m3-usb-phy";
|
||||
reg = <0xc1108400 32>; /* cbus 0x2100 */
|
||||
};
|
||||
|
||||
usb@c9040000 {
|
||||
/* usb-a */
|
||||
compatible = "synopsys,designware-hs-otg2";
|
||||
reg = <0xc9040000 0x40000>; /* ahbbus 0x40000*/
|
||||
interrupts = <0 30 4>; /* AM_IRQ0(30) */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
usb@c90c0000 {
|
||||
/* usb-b */
|
||||
compatible = "synopsys,designware-hs-otg2";
|
||||
reg = <0xc90c0000 0x40000>; /* ahbbus 0xc0000 */
|
||||
interrupts = <0 31 4>; /* AM_IRQ0(31) */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
eth@c9410000 {
|
||||
/* ethernet */
|
||||
compatible = "snps,dwmac";
|
||||
reg = <0xc9410000 0x2000>; /* ahbbus 0x410000 */
|
||||
interrupts = <0 8 1>; /* AM_IRQ0(8) */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
screen: fb@c8001324 {
|
||||
device_type = "display";
|
||||
compatible = "amlogic,aml8726-fb";
|
||||
reg = <0xc8001324 12>, /* CANVAS */
|
||||
<0xc1106800 1024>, /* VIU */
|
||||
<0xc1107400 1024>; /* VPP */
|
||||
interrupts = <0 2 1>, /* AM_IRQ0(2) */
|
||||
<0 3 1>, /* AM_IRQ0(3) */
|
||||
<0 12 1>, /* AM_IRQ0(12) */
|
||||
<0 13 1>; /* AM_IRQ0(13) */
|
||||
|
||||
address = <0x84900000>; /* match memreserve */
|
||||
width = <720>;
|
||||
height = <480>;
|
||||
depth = <24>;
|
||||
linebytes = <2160>;
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdin = "uart0";
|
||||
stdout = "uart0";
|
||||
};
|
||||
};
|
||||
|
||||
&clk81 {
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
&uart_AO {
|
||||
status = "okay";
|
||||
current-speed = <115200>;
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user