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cgem: improve usage of busdma(9) KPI

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BUS_DMA_NOCACHE should only be used when one needs to guarantee the
created mapping has uncached memory attributes, usually as a result
of buggy hardware. Normal use cases should pass BUS_DMA_COHERENT, to
create an appropriate mapping based on the flags passed to
bus_dma_tag_create().

This should have no functional change, since the DMA tags in this driver
are created without the BUS_DMA_COHERENT flag.

Reported by:	mmel
Reviewed by:	mmel, Thomas Skibo <thomas-bsd@skibo.net>
MFC after:	3 days
This commit is contained in:
Mitchell Horne 2021-01-20 11:07:53 -04:00
parent cee8be2c78
commit 04d2d2d7fd
1 changed files with 4 additions and 8 deletions
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12
sys/dev/cadence/if_cgem.c
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@ -443,17 +443,13 @@ cgem_setup_descs(struct cgem_softc *sc)
return (err);
/*
* Allocate DMA memory in non-cacheable space. We allocate transmit,
* receive and null descriptor queues all at once because the
* hardware only provides one register for the upper 32 bits of
* rx and tx descriptor queues hardware addresses.
* Allocate DMA memory. We allocate transmit, receive and null
* descriptor queues all at once because the hardware only provides
* one register for the upper 32 bits of rx and tx descriptor queues
* hardware addresses.
*/
err = bus_dmamem_alloc(sc->desc_dma_tag, (void **)&sc->rxring,
#ifdef __arm__
BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_ZERO,
#else
BUS_DMA_NOWAIT | BUS_DMA_NOCACHE | BUS_DMA_ZERO,
#endif
&sc->rxring_dma_map);
if (err)
return (err);