aic7xxx.h:
Add constants for SPI protocol delays that are needed for target mode. aic7xxx.c: Correct a target mode issue that caused an occassional spurious REQ to be seen on the bus when performing manual message processing (e.g. transfer rate negotiation). Enforce phase change bus settle rules with explicit delays when performing manual message processing in target mode. The sequencer already did this for "fast-path", target mode message processing.
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gibbs
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ffa28768e3
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06094f1554
@ -2828,11 +2828,17 @@ reswitch:
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case MSG_TYPE_TARGET_MSGIN:
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{
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int msgdone;
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int msgout_request;
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if (ahc->msgout_len == 0)
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panic("Target MSGIN with no active message");
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#ifdef AHC_DEBUG
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if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
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ahc_print_devinfo(ahc, &devinfo);
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printf("TARGET_MSG_IN");
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}
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#endif
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/*
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* If we interrupted a mesgout session, the initiator
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* will not know this until our first REQ. So, we
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@ -2840,24 +2846,47 @@ reswitch:
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* first byte.
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*/
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if ((ahc_inb(ahc, SCSISIGI) & ATNI) != 0
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&& ahc->msgout_index > 0)
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msgout_request = TRUE;
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else
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msgout_request = FALSE;
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if (msgout_request) {
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&& ahc->msgout_index > 0) {
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/*
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* Change gears and see if
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* this messages is of interest to
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* us or should be passed back to
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* the sequencer.
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* Change gears and see if this messages is
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* of interest to us or should be passed back
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* to the sequencer.
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*/
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#ifdef AHC_DEBUG
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if ((ahc_debug & AHC_SHOW_MESSAGES) != 0)
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printf(" Honoring ATN Request.\n");
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#endif
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ahc->msg_type = MSG_TYPE_TARGET_MSGOUT;
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/*
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* Disable SCSI Programmed I/O during the
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* phase change so as to avoid phantom REQs.
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*/
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ahc_outb(ahc, SXFRCTL0,
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ahc_inb(ahc, SXFRCTL0) & ~SPIOEN);
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/*
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* Since SPIORDY asserts when ACK is asserted
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* for P_MSGOUT, and SPIORDY's assertion triggered
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* our entry into this routine, wait for ACK to
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* *de-assert* before changing phases.
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*/
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while ((ahc_inb(ahc, SCSISIGI) & ACKI) != 0)
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;
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ahc_outb(ahc, SCSISIGO, P_MESGOUT | BSYO);
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/*
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* All phase line changes require a bus
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* settle delay before REQ is asserted.
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* [SCSI SPI4 10.7.1]
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*/
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ahc_flush_device_writes(ahc);
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aic_delay(AHC_BUSSETTLE_DELAY);
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ahc->msgin_index = 0;
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/* Dummy read to REQ for first byte */
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ahc_inb(ahc, SCSIDATL);
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/* Enable SCSI Programmed I/O to REQ for first byte */
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ahc_outb(ahc, SXFRCTL0,
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ahc_inb(ahc, SXFRCTL0) | SPIOEN);
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break;
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@ -2874,6 +2903,11 @@ reswitch:
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/*
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* Present the next byte on the bus.
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*/
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#ifdef AHC_DEBUG
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if ((ahc_debug & AHC_SHOW_MESSAGES) != 0)
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printf(" byte 0x%x\n",
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ahc->msgout_buf[ahc->msgout_index]);
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#endif
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ahc_outb(ahc, SXFRCTL0, ahc_inb(ahc, SXFRCTL0) | SPIOEN);
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ahc_outb(ahc, SCSIDATL, ahc->msgout_buf[ahc->msgout_index++]);
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break;
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@ -2883,6 +2917,12 @@ reswitch:
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int lastbyte;
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int msgdone;
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#ifdef AHC_DEBUG
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if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
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ahc_print_devinfo(ahc, &devinfo);
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printf("TARGET_MSG_OUT");
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}
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#endif
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/*
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* The initiator signals that this is
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* the last byte by dropping ATN.
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@ -2896,6 +2936,13 @@ reswitch:
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*/
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ahc_outb(ahc, SXFRCTL0, ahc_inb(ahc, SXFRCTL0) & ~SPIOEN);
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ahc->msgin_buf[ahc->msgin_index] = ahc_inb(ahc, SCSIDATL);
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#ifdef AHC_DEBUG
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if ((ahc_debug & AHC_SHOW_MESSAGES) != 0)
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printf(" byte 0x%x\n",
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ahc->msgin_buf[ahc->msgin_index]);
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#endif
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msgdone = ahc_parse_msg(ahc, &devinfo);
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if (msgdone == MSGLOOP_TERMINATED) {
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/*
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@ -2921,7 +2968,33 @@ reswitch:
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* to the Message in phase and send it.
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*/
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if (ahc->msgout_len != 0) {
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#ifdef AHC_DEBUG
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if ((ahc_debug & AHC_SHOW_MESSAGES) != 0) {
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ahc_print_devinfo(ahc, &devinfo);
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printf(" preparing response.\n");
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}
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#endif
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ahc_outb(ahc, SCSISIGO, P_MESGIN | BSYO);
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/*
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* All phase line changes require a bus
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* settle delay before REQ is asserted.
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* [SCSI SPI4 10.7.1] When transitioning
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* from an OUT to an IN phase, we must
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* also wait a data release delay to allow
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* the initiator time to release the data
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* lines. [SCSI SPI4 10.12]
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*/
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ahc_flush_device_writes(ahc);
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aic_delay(AHC_BUSSETTLE_DELAY
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+ AHC_DATARELEASE_DELAY);
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/*
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* Enable SCSI Programmed I/O. This will
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* immediately cause SPIORDY to assert,
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* and the sequencer will call our message
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* loop again.
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*/
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ahc_outb(ahc, SXFRCTL0,
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ahc_inb(ahc, SXFRCTL0) | SPIOEN);
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ahc->msg_type = MSG_TYPE_TARGET_MSGIN;
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@ -7052,7 +7125,7 @@ bus_reset:
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active_scb = ahc_lookup_scb(ahc, active_scb_index);
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if (active_scb != scb) {
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if (ahc_other_scb_timeout(ahc, scb,
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active_scb) != 0)
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active_scb) == 0)
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goto bus_reset;
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continue;
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}
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@ -181,6 +181,10 @@ struct seeprom_descriptor;
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/* Reset line assertion time in us */
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#define AHC_BUSRESET_DELAY 25
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/* Phase change constants used in target mode. */
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#define AHC_BUSSETTLE_DELAY 400
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#define AHC_DATARELEASE_DELAY 400
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/******************* Chip Characteristics/Operating Settings *****************/
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/*
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* Chip Type
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