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Simplify spill/fill fault handling by updating tl1_trap register

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usage to conform to that of tl0_trap - the separate code path
for unaligned faults was never getting used (and evidently doesn't
work), so ifdef out for now
This commit is contained in:
Kip Macy 2006-12-18 02:04:43 +00:00
parent d33e106719
commit 0622a9e491
2 changed files with 18 additions and 28 deletions
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17
sys/sun4v/sun4v/exception.S
View File

@ -1997,20 +1997,19 @@ ENTRY(tl1_trap)
4:
wrpr %g0, %g7, %tnpc
wrpr %g0, 1, %gl
rdpr %tt, %g5
rdpr %tt, %g2
GET_MMFSA_SCRATCH(%g7)
wr %g0, ASI_REAL, %asi
ldxa [%g7 + MMFSA_D_ADDR]%asi, %g6
ldxa [%g7 + MMFSA_D_ADDR]%asi, %g3
ldxa [%g7 + MMFSA_D_CTX]%asi, %g7
cmp %g5, T_ALIGNMENT
be,pn %xcc, 5f
nop
srlx %g6, PAGE_SHIFT, %g6
sllx %g6, PAGE_SHIFT, %g6 ! mask off bottom
or %g6, %g7, %g6
! XXX we're only handling page faults here
srlx %g3, PAGE_SHIFT, %g3
sllx %g3, PAGE_SHIFT, %g3 ! mask off bottom
or %g3, %g7, %g3
done
5:
#ifdef notyet
sllx %g7, TRAP_CTX_SHIFT, %g7
or %g7, %g5, %g5
done
#endif
END(tl1_trap)

29
sys/sun4v/sun4v/wbuf.S
View File

@ -32,21 +32,19 @@ END(fault_32bit_so1)
ENTRY(fault_64bit_sn0)
GET_PCB(%g4)
stx %sp, [%g4 + PCB_RWSP]
add %g4, PCB_RW, %g3
SAVE_WINDOW(%g3)
mov 1, %g3
stx %g3, [%g4 + PCB_NSAVED]
add %g4, PCB_RW, %g5
SAVE_WINDOW(%g5)
mov 1, %g5
stx %g5, [%g4 + PCB_NSAVED]
! convert hardware trap type to kernel trap type
set trap_conversion, %g1
sllx %g5, INT_SHIFT, %g5
ld [%g1 + %g5], %g2
sllx %g2, INT_SHIFT, %g2
ld [%g1 + %g2], %g2
set trap, %g1
mov %g6, %g3
sub %g0, 1, %g4
rdpr %tstate, %g5
and %g5, TSTATE_CWP_MASK, %g5
ba,pt %xcc, tl0_utrap
@ -129,12 +127,6 @@ ENTRY(fault_32bit_fn0)
MAGIC_TRAP_ON
MAGIC_EXIT
fault_fn0_common:
mov %g6, %g3
mov T_DATA_MISS, %g2
cmp %g5, T_ALIGNMENT
beq,a,pn %xcc, 1f
mov T_ALIGNMENT, %g2
1:
set trap, %g1
sub %g0, 1, %g4
rdpr %tstate, %g5
@ -166,14 +158,13 @@ fault_fn1_common:
! convert hardware trap type to kernel trap type
set trap_conversion, %g1
sllx %g5, INT_SHIFT, %g5
ld [%g1 + %g5], %g5
sllx %g2, INT_SHIFT, %g2
ld [%g1 + %g2], %g2
set trap, %g1
mov 1, %g2
sllx %g2, CTX_OTHER_SHIFT, %g2
mov 1, %g5
sllx %g5, CTX_OTHER_SHIFT, %g5
or %g5, %g2, %g2
mov %g6, %g3
sub %g0, 1, %g4
rdpr %wstate, %l1