- Output a summary of optional VT-x features in dmesg similar to CPU
features. If bootverbose is enabled, a detailed list is provided; otherwise, a single-line summary is displayed. - Add read-only sysctls for optional VT-x capabilities used by bhyve under a new hw.vmm.vmx.cap node. Move a few exiting sysctls that indicate the presence of optional capabilities under this node. CR: https://phabric.freebsd.org/D498 Reviewed by: grehan, neel MFC after: 1 week
This commit is contained in:
John Baldwin
parent
39c8c62ec4
commit
06fc6db948
@ -61,6 +61,7 @@ __FBSDID("$FreeBSD$");
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#include <machine/specialreg.h>
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#include <machine/md_var.h>
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#include <amd64/vmm/intel/vmx_controls.h>
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#include <x86/isa/icu.h>
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/* XXX - should be in header file: */
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@ -73,6 +74,7 @@ static u_int find_cpu_vendor_id(void);
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static void print_AMD_info(void);
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static void print_AMD_assoc(int i);
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static void print_via_padlock_info(void);
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static void print_vmx_info(void);
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int cpu_class;
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char machine[] = "amd64";
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@ -428,6 +430,9 @@ printcpuinfo(void)
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if (via_feature_rng != 0 || via_feature_xcrypt != 0)
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print_via_padlock_info();
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if (cpu_feature2 & CPUID2_VMX)
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print_vmx_info();
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if ((cpu_feature & CPUID_HTT) &&
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cpu_vendor_id == CPU_VENDOR_AMD)
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cpu_feature &= ~CPUID_HTT;
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@ -722,3 +727,197 @@ print_via_padlock_info(void)
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"\015RSA" /* PMM */
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);
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}
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static uint32_t
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vmx_settable(uint64_t basic, int msr, int true_msr)
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{
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uint64_t val;
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if (basic & (1UL << 55))
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val = rdmsr(true_msr);
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else
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val = rdmsr(msr);
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/* Just report the controls that can be set to 1. */
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return (val >> 32);
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}
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static void
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print_vmx_info(void)
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{
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uint64_t basic, msr;
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uint32_t entry, exit, mask, pin, proc, proc2;
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int comma;
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printf("\n VT-x: ");
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msr = rdmsr(MSR_IA32_FEATURE_CONTROL);
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if (!(msr & IA32_FEATURE_CONTROL_VMX_EN))
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printf("(disabled in BIOS) ");
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basic = rdmsr(MSR_VMX_BASIC);
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pin = vmx_settable(basic, MSR_VMX_PINBASED_CTLS,
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MSR_VMX_TRUE_PINBASED_CTLS);
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proc = vmx_settable(basic, MSR_VMX_PROCBASED_CTLS,
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MSR_VMX_TRUE_PROCBASED_CTLS);
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if (proc & PROCBASED_SECONDARY_CONTROLS)
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proc2 = vmx_settable(basic, MSR_VMX_PROCBASED_CTLS2,
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MSR_VMX_PROCBASED_CTLS2);
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else
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proc2 = 0;
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exit = vmx_settable(basic, MSR_VMX_EXIT_CTLS, MSR_VMX_TRUE_EXIT_CTLS);
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entry = vmx_settable(basic, MSR_VMX_ENTRY_CTLS, MSR_VMX_TRUE_ENTRY_CTLS);
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if (!bootverbose) {
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comma = 0;
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if (exit & VM_EXIT_SAVE_PAT && exit & VM_EXIT_LOAD_PAT &&
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entry & VM_ENTRY_LOAD_PAT) {
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printf("%sPAT", comma ? "," : "");
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comma = 1;
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}
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if (proc & PROCBASED_HLT_EXITING) {
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printf("%sHLT", comma ? "," : "");
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comma = 1;
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}
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if (proc & PROCBASED_MTF) {
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printf("%sMTF", comma ? "," : "");
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comma = 1;
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}
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if (proc & PROCBASED_PAUSE_EXITING) {
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printf("%sPAUSE", comma ? "," : "");
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comma = 1;
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}
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if (proc2 & PROCBASED2_ENABLE_EPT) {
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printf("%sEPT", comma ? "," : "");
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comma = 1;
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}
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if (proc2 & PROCBASED2_UNRESTRICTED_GUEST) {
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printf("%sUG", comma ? "," : "");
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comma = 1;
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}
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if (proc2 & PROCBASED2_ENABLE_VPID) {
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printf("%sVPID", comma ? "," : "");
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comma = 1;
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}
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if (proc & PROCBASED_USE_TPR_SHADOW &&
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proc2 & PROCBASED2_VIRTUALIZE_APIC_ACCESSES &&
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proc2 & PROCBASED2_VIRTUALIZE_X2APIC_MODE &&
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proc2 & PROCBASED2_APIC_REGISTER_VIRTUALIZATION &&
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proc2 & PROCBASED2_VIRTUAL_INTERRUPT_DELIVERY) {
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printf("%sVID", comma ? "," : "");
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comma = 1;
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if (pin & PINBASED_POSTED_INTERRUPT)
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printf(",PostIntr");
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}
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return;
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}
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mask = basic >> 32;
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printf("Basic Features=0x%b", mask,
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"\020"
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"\02132PA" /* 32-bit physical addresses */
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"\022SMM" /* SMM dual-monitor */
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"\027INS/OUTS" /* VM-exit info for INS and OUTS */
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"\030TRUE" /* TRUE_CTLS MSRs */
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);
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printf("\n Pin-Based Controls=0x%b", pin,
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"\020"
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"\001ExtINT" /* External-interrupt exiting */
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"\004NMI" /* NMI exiting */
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"\006VNMI" /* Virtual NMIs */
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"\007PreTmr" /* Activate VMX-preemption timer */
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"\010PostIntr" /* Process posted interrupts */
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);
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printf("\n Primary Processor Controls=0x%b", proc,
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"\020"
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"\003INTWIN" /* Interrupt-window exiting */
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"\004TSCOff" /* Use TSC offsetting */
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"\010HLT" /* HLT exiting */
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"\012INVLPG" /* INVLPG exiting */
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"\013MWAIT" /* MWAIT exiting */
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"\014RDPMC" /* RDPMC exiting */
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"\015RDTSC" /* RDTSC exiting */
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"\020CR3-LD" /* CR3-load exiting */
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"\021CR3-ST" /* CR3-store exiting */
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"\024CR8-LD" /* CR8-load exiting */
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"\025CR8-ST" /* CR8-store exiting */
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"\026TPR" /* Use TPR shadow */
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"\027NMIWIN" /* NMI-window exiting */
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"\030MOV-DR" /* MOV-DR exiting */
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"\031IO" /* Unconditional I/O exiting */
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"\032IOmap" /* Use I/O bitmaps */
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"\034MTF" /* Monitor trap flag */
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"\035MSRmap" /* Use MSR bitmaps */
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"\036MONITOR" /* MONITOR exiting */
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"\037PAUSE" /* PAUSE exiting */
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);
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if (proc & PROCBASED_SECONDARY_CONTROLS)
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printf("\n Secondary Processor Controls=0x%b", proc2,
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"\020"
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"\001APIC" /* Virtualize APIC accesses */
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"\002EPT" /* Enable EPT */
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"\003DT" /* Descriptor-table exiting */
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"\004RDTSCP" /* Enable RDTSCP */
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"\005x2APIC" /* Virtualize x2APIC mode */
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"\006VPID" /* Enable VPID */
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"\007WBINVD" /* WBINVD exiting */
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"\010UG" /* Unrestricted guest */
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"\011APIC-reg" /* APIC-register virtualization */
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"\012VID" /* Virtual-interrupt delivery */
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"\013PAUSE-loop" /* PAUSE-loop exiting */
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"\014RDRAND" /* RDRAND exiting */
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"\015INVPCID" /* Enable INVPCID */
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"\016VMFUNC" /* Enable VM functions */
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"\017VMCS" /* VMCS shadowing */
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"\020EPT#VE" /* EPT-violation #VE */
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"\021XSAVES" /* Enable XSAVES/XRSTORS */
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);
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printf("\n Exit Controls=0x%b", mask,
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"\020"
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"\003DR" /* Save debug controls */
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/* Ignore Host address-space size */
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"\015PERF" /* Load MSR_PERF_GLOBAL_CTRL */
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"\020AckInt" /* Acknowledge interrupt on exit */
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"\023PAT-SV" /* Save MSR_PAT */
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"\024PAT-LD" /* Load MSR_PAT */
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"\025EFER-SV" /* Save MSR_EFER */
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"\026EFER-LD" /* Load MSR_EFER */
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"\027PTMR-SV" /* Save VMX-preemption timer value */
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);
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printf("\n Entry Controls=0x%b", mask,
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"\020"
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"\003DR" /* Save debug controls */
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/* Ignore IA-32e mode guest */
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/* Ignore Entry to SMM */
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/* Ignore Deactivate dual-monitor treatment */
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"\016PERF" /* Load MSR_PERF_GLOBAL_CTRL */
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"\017PAT" /* Load MSR_PAT */
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"\020EFER" /* Load MSR_EFER */
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);
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if (proc & PROCBASED_SECONDARY_CONTROLS &&
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(proc2 & (PROCBASED2_ENABLE_EPT | PROCBASED2_ENABLE_VPID)) != 0) {
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msr = rdmsr(MSR_VMX_EPT_VPID_CAP);
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mask = msr;
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printf("\n EPT Features=0x%b", mask,
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"\020"
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"\001XO" /* Execute-only translations */
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"\007PW4" /* Page-walk length of 4 */
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"\011UC" /* EPT paging-structure mem can be UC */
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"\017WB" /* EPT paging-structure mem can be WB */
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"\0212M" /* EPT PDE can map a 2-Mbyte page */
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"\0221G" /* EPT PDPTE can map a 1-Gbyte page */
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"\025INVEPT" /* INVEPT is supported */
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"\026AD" /* Accessed and dirty flags for EPT */
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"\032single" /* INVEPT single-context type */
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"\033all" /* INVEPT all-context type */
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);
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mask = msr >> 32;
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printf("\n VPID Features=0x%b", mask,
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"\020"
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"\001INVVPID" /* INVVPID is supported */
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"\011individual" /* INVVPID individual-address type */
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"\012single" /* INVVPID single-context type */
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"\013all" /* INVVPID all-context type */
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/* INVVPID single-context-retaining-globals type */
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"\014single-globals"
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);
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}
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}
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@ -149,8 +149,6 @@ SYSCTL_ULONG(_hw_vmm_vmx, OID_AUTO, cr4_ones_mask, CTLFLAG_RD,
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SYSCTL_ULONG(_hw_vmm_vmx, OID_AUTO, cr4_zeros_mask, CTLFLAG_RD,
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&cr4_zeros_mask, 0, NULL);
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static int vmx_no_patmsr;
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static int vmx_initialized;
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SYSCTL_INT(_hw_vmm_vmx, OID_AUTO, initialized, CTLFLAG_RD,
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&vmx_initialized, 0, "Intel VMX initialized");
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@ -158,18 +156,38 @@ SYSCTL_INT(_hw_vmm_vmx, OID_AUTO, initialized, CTLFLAG_RD,
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/*
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* Optional capabilities
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*/
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static SYSCTL_NODE(_hw_vmm_vmx, OID_AUTO, cap, CTLFLAG_RW, NULL, NULL);
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static int vmx_patmsr;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, patmsr, CTLFLAG_RD, &vmx_patmsr, 0,
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"PAT MSR saved and restored in VCMS");
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static int cap_halt_exit;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, halt_exit, CTLFLAG_RD, &cap_halt_exit, 0,
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"HLT triggers a VM-exit");
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static int cap_pause_exit;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, pause_exit, CTLFLAG_RD, &cap_pause_exit,
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0, "PAUSE triggers a VM-exit");
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static int cap_unrestricted_guest;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, unrestricted_guest, CTLFLAG_RD,
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&cap_unrestricted_guest, 0, "Unrestricted guests");
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static int cap_monitor_trap;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, monitor_trap, CTLFLAG_RD,
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&cap_monitor_trap, 0, "Monitor trap flag");
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static int cap_invpcid;
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, invpcid, CTLFLAG_RD, &cap_invpcid,
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0, "Guests are allowed to use INVPCID");
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static int virtual_interrupt_delivery;
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SYSCTL_INT(_hw_vmm_vmx, OID_AUTO, virtual_interrupt_delivery, CTLFLAG_RD,
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, virtual_interrupt_delivery, CTLFLAG_RD,
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&virtual_interrupt_delivery, 0, "APICv virtual interrupt delivery support");
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static int posted_interrupts;
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SYSCTL_INT(_hw_vmm_vmx, OID_AUTO, posted_interrupts, CTLFLAG_RD,
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SYSCTL_INT(_hw_vmm_vmx_cap, OID_AUTO, posted_interrupts, CTLFLAG_RD,
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&posted_interrupts, 0, "APICv posted interrupt support");
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static int pirvec;
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@ -618,6 +636,7 @@ vmx_init(int ipinum)
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}
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/* Check support for VM-exit controls */
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vmx_patmsr = 1;
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error = vmx_set_ctlreg(MSR_VMX_EXIT_CTLS, MSR_VMX_TRUE_EXIT_CTLS,
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VM_EXIT_CTLS_ONE_SETTING,
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VM_EXIT_CTLS_ZERO_SETTING,
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@ -637,12 +656,12 @@ vmx_init(int ipinum)
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if (bootverbose)
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printf("vmm: PAT MSR access not supported\n");
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guest_msr_valid(MSR_PAT);
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vmx_no_patmsr = 1;
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vmx_patmsr = 0;
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}
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}
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/* Check support for VM-entry controls */
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if (!vmx_no_patmsr) {
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if (vmx_patmsr) {
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error = vmx_set_ctlreg(MSR_VMX_ENTRY_CTLS,
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MSR_VMX_TRUE_ENTRY_CTLS,
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VM_ENTRY_CTLS_ONE_SETTING,
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@ -918,7 +937,7 @@ vmx_vminit(struct vm *vm, pmap_t pmap)
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* MSR_PAT save/restore support, leave access disabled so accesses
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* will be trapped.
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*/
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if (!vmx_no_patmsr && guest_msr_rw(vmx, MSR_PAT))
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if (vmx_patmsr && guest_msr_rw(vmx, MSR_PAT))
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panic("vmx_vminit: error setting guest pat msr access");
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vpid_alloc(vpid, VM_MAXCPU);
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@ -33,6 +33,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/systm.h>
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#include <machine/cpufunc.h>
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#include <machine/specialreg.h>
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#include "vmx_msr.h"
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@ -29,29 +29,6 @@
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#ifndef _VMX_MSR_H_
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#define _VMX_MSR_H_
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#define MSR_VMX_BASIC 0x480
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#define MSR_VMX_EPT_VPID_CAP 0x48C
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#define MSR_VMX_PROCBASED_CTLS 0x482
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#define MSR_VMX_TRUE_PROCBASED_CTLS 0x48E
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#define MSR_VMX_PINBASED_CTLS 0x481
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#define MSR_VMX_TRUE_PINBASED_CTLS 0x48D
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#define MSR_VMX_PROCBASED_CTLS2 0x48B
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#define MSR_VMX_EXIT_CTLS 0x483
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#define MSR_VMX_TRUE_EXIT_CTLS 0x48f
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#define MSR_VMX_ENTRY_CTLS 0x484
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#define MSR_VMX_TRUE_ENTRY_CTLS 0x490
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#define MSR_VMX_CR0_FIXED0 0x486
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#define MSR_VMX_CR0_FIXED1 0x487
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#define MSR_VMX_CR4_FIXED0 0x488
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#define MSR_VMX_CR4_FIXED1 0x489
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uint32_t vmx_revision(void);
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int vmx_set_ctlreg(int ctl_reg, int true_ctl_reg, uint32_t ones_mask,
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@ -435,6 +435,25 @@
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#define MSR_MC4_ADDR 0x412
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#define MSR_MC4_MISC 0x413
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/*
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* VMX MSRs
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*/
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#define MSR_VMX_BASIC 0x480
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#define MSR_VMX_PINBASED_CTLS 0x481
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#define MSR_VMX_PROCBASED_CTLS 0x482
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#define MSR_VMX_EXIT_CTLS 0x483
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#define MSR_VMX_ENTRY_CTLS 0x484
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#define MSR_VMX_CR0_FIXED0 0x486
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#define MSR_VMX_CR0_FIXED1 0x487
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#define MSR_VMX_CR4_FIXED0 0x488
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#define MSR_VMX_CR4_FIXED1 0x489
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#define MSR_VMX_PROCBASED_CTLS2 0x48b
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#define MSR_VMX_EPT_VPID_CAP 0x48c
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#define MSR_VMX_TRUE_PINBASED_CTLS 0x48d
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#define MSR_VMX_TRUE_PROCBASED_CTLS 0x48e
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#define MSR_VMX_TRUE_EXIT_CTLS 0x48f
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#define MSR_VMX_TRUE_ENTRY_CTLS 0x490
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/*
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* X2APIC MSRs
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*/
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