mlx5fpga: IOCTL for FPGA temperature measurement
Submitted by: kib@ Approved by: hselasky (mentor) MFC after: 1 week Sponsored by: Mellanox Technologies
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@ -151,6 +151,7 @@ enum {
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MLX5_REG_PMLP = 0x5002,
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MLX5_REG_NODE_DESC = 0x6001,
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MLX5_REG_HOST_ENDIANNESS = 0x7004,
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MLX5_REG_MTMP = 0x900a,
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MLX5_REG_MCIA = 0x9014,
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MLX5_REG_MPCNT = 0x9051,
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};
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@ -60,6 +60,8 @@ struct mlx5_fpga_shell_counters {
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int mlx5_fpga_caps(struct mlx5_core_dev *dev);
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int mlx5_fpga_query(struct mlx5_core_dev *dev, struct mlx5_fpga_query *query);
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int mlx5_fpga_query_mtmp(struct mlx5_core_dev *dev,
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struct mlx5_fpga_temperature *temp);
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int mlx5_fpga_ctrl_op(struct mlx5_core_dev *dev, u8 op);
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int mlx5_fpga_access_reg(struct mlx5_core_dev *dev, u8 size, u64 addr,
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void *buf, bool write);
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@ -164,6 +164,38 @@ int mlx5_fpga_query(struct mlx5_core_dev *dev, struct mlx5_fpga_query *query)
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return 0;
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}
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int mlx5_fpga_query_mtmp(struct mlx5_core_dev *dev,
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struct mlx5_fpga_temperature *temp)
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{
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u32 in[MLX5_ST_SZ_DW(mtmp_reg)] = {0};
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u32 out[MLX5_ST_SZ_DW(mtmp_reg)] = {0};
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int err;
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MLX5_SET(mtmp_reg, in, sensor_index, temp->index);
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MLX5_SET(mtmp_reg, in, i,
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((temp->index < MLX5_FPGA_INTERNAL_SENSORS_LOW) ||
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(temp->index > MLX5_FPGA_INTERNAL_SENSORS_HIGH)) ? 1 : 0);
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err = mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out),
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MLX5_REG_MTMP, 0, false);
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if (err)
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return err;
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temp->index = MLX5_GET(mtmp_reg, out, sensor_index);
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temp->temperature = MLX5_GET(mtmp_reg, out, temperature);
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temp->mte = MLX5_GET(mtmp_reg, out, mte);
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temp->max_temperature = MLX5_GET(mtmp_reg, out, max_temperature);
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temp->tee = MLX5_GET(mtmp_reg, out, tee);
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temp->temperature_threshold_hi = MLX5_GET(mtmp_reg, out,
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temperature_threshold_hi);
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temp->temperature_threshold_lo = MLX5_GET(mtmp_reg, out,
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temperature_threshold_lo);
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memcpy(temp->sensor_name, MLX5_ADDR_OF(mtmp_reg, out, sensor_name),
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MLX5_FLD_SZ_BYTES(mtmp_reg, sensor_name));
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return 0;
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}
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int mlx5_fpga_create_qp(struct mlx5_core_dev *dev, void *fpga_qpc,
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u32 *fpga_qpn)
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{
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@ -442,6 +442,13 @@ int mlx5_fpga_flash_select(struct mlx5_fpga_device *fdev,
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}
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EXPORT_SYMBOL(mlx5_fpga_flash_select);
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int mlx5_fpga_temperature(struct mlx5_fpga_device *fdev,
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struct mlx5_fpga_temperature *temp)
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{
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return mlx5_fpga_query_mtmp(fdev->mdev, temp);
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}
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EXPORT_SYMBOL(mlx5_fpga_temperature);
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struct device *mlx5_fpga_dev(struct mlx5_fpga_device *fdev)
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{
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return &fdev->mdev->pdev->dev;
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@ -355,6 +355,16 @@ void mlx5_fpga_device_query(struct mlx5_fpga_device *fdev,
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*/
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struct device *mlx5_fpga_dev(struct mlx5_fpga_device *fdev);
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/**
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* mlx5_fpga_temperature() - Retrieve FPGA sensor of temperature
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* @fdev: The FPGA device
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* Return: 0 if successful
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* or any other error value otherwise.
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*/
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int mlx5_fpga_temperature(struct mlx5_fpga_device *fdev,
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struct mlx5_fpga_temperature *temp);
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/**
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* mlx5_fpga_get_cap() - Returns the FPGA cap mailbox from FW without parsing.
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* @fdev: The FPGA device
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@ -200,6 +200,7 @@ tools_char_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct tools_context *context;
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struct mlx5_fpga_device *fdev;
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struct mlx5_fpga_query query;
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struct mlx5_fpga_temperature *temperature;
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u32 fpga_cap[MLX5_ST_SZ_DW(fpga_cap)] = {0};
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int arg, err;
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@ -254,6 +255,11 @@ tools_char_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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bcopy(&fpga_cap, data, sizeof(fpga_cap));
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err = 0;
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break;
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case MLX5_FPGA_TEMPERATURE:
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temperature = (struct mlx5_fpga_temperature *)data;
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mlx5_fpga_temperature(fdev, temperature);
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err = 0; /* XXXKIB */
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break;
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default:
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dev_err(mlx5_fpga_dev(fdev),
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"unknown ioctl command %#08lx\n", cmd);
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@ -8520,6 +8520,31 @@ struct mlx5_ifc_link_level_retrans_cntr_grp_date_bits {
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u8 reserved_0[0x640];
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};
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struct mlx5_ifc_mtmp_reg_bits {
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u8 i[0x1];
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u8 reserved_at_1[0x18];
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u8 sensor_index[0x7];
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u8 reserved_at_20[0x10];
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u8 temperature[0x10];
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u8 mte[0x1];
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u8 mtr[0x1];
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u8 reserved_at_42[0x0e];
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u8 max_temperature[0x10];
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u8 tee[0x2];
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u8 reserved_at_62[0x0e];
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u8 temperature_threshold_hi[0x10];
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u8 reserved_at_80[0x10];
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u8 temperature_threshold_lo[0x10];
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u8 reserved_at_100[0x20];
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u8 sensor_name[0x40];
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};
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struct mlx5_ifc_lane_2_module_mapping_bits {
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u8 reserved_0[0x6];
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u8 rx_lane[0x2];
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@ -84,6 +84,12 @@ struct mlx5_fpga_query {
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enum mlx5_fpga_status image_status;
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};
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enum mlx5_fpga_tee {
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MLX5_FPGA_TEE_DISABLE = 0,
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MLX5_FPGA_TEE_GENERATE_EVENT = 1,
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MLX5_FPGA_TEE_GENERATE_SINGLE_EVENT = 2,
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};
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/**
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* enum mlx5_fpga_access_type - Enumerated the different methods possible for
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* accessing the device memory address space
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@ -98,6 +104,21 @@ enum mlx5_fpga_access_type {
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MLX5_FPGA_ACCESS_TYPE_MAX = MLX5_FPGA_ACCESS_TYPE_DONTCARE,
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};
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#define MLX5_FPGA_INTERNAL_SENSORS_LOW 63
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#define MLX5_FPGA_INTERNAL_SENSORS_HIGH 63
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struct mlx5_fpga_temperature {
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uint32_t temperature;
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uint32_t index;
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uint32_t tee;
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uint32_t max_temperature;
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uint32_t temperature_threshold_hi;
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uint32_t temperature_threshold_lo;
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uint32_t mte;
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uint32_t mtr;
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char sensor_name[16];
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};
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#define MLX5_FPGA_CAP_ARR_SZ 0x40
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#define MLX5_FPGA_ACCESS_TYPE _IOWINT('m', 0x80)
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@ -106,6 +127,7 @@ enum mlx5_fpga_access_type {
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#define MLX5_FPGA_IMAGE_SEL _IOWINT('m', 0x83)
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#define MLX5_FPGA_QUERY _IOR('m', 0x84, struct mlx5_fpga_query)
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#define MLX5_FPGA_CAP _IOR('m', 0x85, u32[MLX5_FPGA_CAP_ARR_SZ])
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#define MLX5_FPGA_TEMPERATURE _IOWR('m', 0x86, struct mlx5_fpga_temperature)
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#define MLX5_FPGA_TOOLS_NAME_SUFFIX "_mlx5_fpga_tools"
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