NTB: Rename some variables/functions to match Linux
No functional change. Still part of the huge e26a5843 rewrite. I'm trying to make it less of a complete rewrite in the FreeBSD version of the driver. Still, it helps if our names match Linux. Obtained from: Linux (e26a5843) (Dual BSD/GPL driver) Sponsored by: EMC / Isilon Storage Division
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8bc8b64361
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09ef809907
@ -220,7 +220,7 @@ enum {
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IF_NTB_MAX_SPAD,
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};
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#define QP_TO_MW(ntb, qp) ((qp) % ntb_get_max_mw(ntb))
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#define QP_TO_MW(ntb, qp) ((qp) % ntb_mw_count(ntb))
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#define NTB_QP_DEF_NUM_ENTRIES 100
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#define NTB_LINK_DOWN_TIMEOUT 10
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@ -493,7 +493,7 @@ ntb_transport_init(struct ntb_softc *ntb)
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int rc, i;
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if (max_num_clients == 0)
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nt->max_qps = MIN(ntb_get_max_cbs(ntb), ntb_get_max_mw(ntb));
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nt->max_qps = MIN(ntb_get_max_cbs(ntb), ntb_mw_count(ntb));
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else
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nt->max_qps = MIN(ntb_get_max_cbs(ntb), max_num_clients);
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@ -562,7 +562,7 @@ ntb_transport_init_queue(struct ntb_netdev *nt, unsigned int qp_num)
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unsigned int num_qps_mw, tx_size;
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uint8_t mw_num, mw_max;
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mw_max = ntb_get_max_mw(nt->ntb);
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mw_max = ntb_mw_count(nt->ntb);
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mw_num = QP_TO_MW(nt->ntb, qp_num);
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qp = &nt->qps[qp_num];
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@ -1055,7 +1055,7 @@ ntb_transport_link_work(void *arg)
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uint32_t val, i, num_mw;
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int rc;
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num_mw = ntb_get_max_mw(ntb);
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num_mw = ntb_mw_count(ntb);
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/* send the local info, in the opposite order of the way we read it */
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for (i = 0; i < num_mw; i++) {
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@ -1214,7 +1214,7 @@ ntb_transport_setup_qp_mw(struct ntb_netdev *nt, unsigned int qp_num)
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uint8_t mw_num, mw_max;
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unsigned int i;
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mw_max = ntb_get_max_mw(nt->ntb);
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mw_max = ntb_mw_count(nt->ntb);
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mw_num = QP_TO_MW(nt->ntb, qp_num);
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if (nt->max_qps % mw_max && mw_num + 1 < nt->max_qps / mw_max)
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@ -59,17 +59,10 @@ __FBSDID("$FreeBSD$");
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* be picked up and redistributed in Linux with a dual GPL/BSD license.
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*/
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#define NTB_CONFIG_BAR 0
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#define NTB_B2B_BAR_1 1
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#define NTB_B2B_BAR_2 2
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#define NTB_B2B_BAR_3 3
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#define NTB_MAX_BARS 4
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#define NTB_MW_TO_BAR(mw) ((mw) + 1)
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#define MAX_MSIX_INTERRUPTS MAX(XEON_DB_COUNT, SOC_DB_COUNT)
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#define NTB_HB_TIMEOUT 1 /* second */
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#define SOC_LINK_RECOVERY_TIME 500
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#define NTB_HB_TIMEOUT 1 /* second */
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#define SOC_LINK_RECOVERY_TIME 500 /* ms */
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#define DEVICE2SOFTC(dev) ((struct ntb_softc *) device_get_softc(dev))
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@ -78,6 +71,14 @@ enum ntb_device_type {
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NTB_SOC
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};
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enum ntb_bar {
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NTB_CONFIG_BAR = 0,
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NTB_B2B_BAR_1,
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NTB_B2B_BAR_2,
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NTB_B2B_BAR_3,
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NTB_MAX_BARS
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};
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/* Device features and workarounds */
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#define HAS_FEATURE(feature) \
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((ntb->features & (feature)) != 0)
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@ -131,12 +132,6 @@ struct ntb_softc {
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struct ntb_db_cb *db_cb;
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uint8_t max_cbs;
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struct {
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uint8_t max_mw;
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uint8_t max_spads;
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uint8_t max_db_bits;
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uint8_t msix_cnt;
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} limits;
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struct {
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uint32_t ldb;
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uint32_t ldb_mask;
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@ -153,10 +148,15 @@ struct ntb_softc {
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uint32_t ppd;
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uint8_t conn_type;
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uint8_t dev_type;
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uint8_t bits_per_vector;
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uint8_t link_status;
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uint8_t link_width;
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uint8_t link_speed;
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uint8_t mw_count;
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uint8_t spad_count;
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uint8_t db_count;
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uint8_t db_vec_count;
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uint8_t db_vec_shift;
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};
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#ifdef __i386__
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@ -189,9 +189,9 @@ bus_space_write_8(bus_space_tag_t tag, bus_space_handle_t handle,
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#define ntb_reg_write(SIZE, offset, val) \
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ntb_bar_write(SIZE, NTB_CONFIG_BAR, offset, val)
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#define ntb_mw_read(SIZE, offset) \
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ntb_bar_read(SIZE, NTB_MW_TO_BAR(ntb->limits.max_mw), offset)
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ntb_bar_read(SIZE, ntb_mw_to_bar(ntb, ntb->mw_count), offset)
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#define ntb_mw_write(SIZE, offset, val) \
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ntb_bar_write(SIZE, NTB_MW_TO_BAR(ntb->limits.max_mw), \
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ntb_bar_write(SIZE, ntb_mw_to_bar(ntb, ntb->mw_count), \
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offset, val)
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typedef int (*bar_map_strategy)(struct ntb_softc *ntb,
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@ -200,6 +200,7 @@ typedef int (*bar_map_strategy)(struct ntb_softc *ntb,
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static int ntb_probe(device_t device);
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static int ntb_attach(device_t device);
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static int ntb_detach(device_t device);
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static inline enum ntb_bar ntb_mw_to_bar(struct ntb_softc *, unsigned mw);
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static int ntb_map_pci_bars(struct ntb_softc *ntb);
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static int map_pci_bar(struct ntb_softc *ntb, bar_map_strategy strategy,
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struct ntb_pci_bar_info *bar);
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@ -218,10 +219,10 @@ static void handle_xeon_irq(void *arg);
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static void handle_xeon_event_irq(void *arg);
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static void ntb_handle_legacy_interrupt(void *arg);
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static void ntb_irq_work(void *arg);
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static uint64_t db_ioread(struct ntb_softc *, uint32_t regoff);
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static void db_iowrite(struct ntb_softc *, uint32_t regoff, uint64_t val);
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static void mask_ldb_interrupt(struct ntb_softc *ntb, unsigned int idx);
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static void unmask_ldb_interrupt(struct ntb_softc *ntb, unsigned int idx);
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static inline uint64_t ntb_db_read(struct ntb_softc *, uint64_t regoff);
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static inline void ntb_db_write(struct ntb_softc *, uint64_t regoff, uint64_t val);
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static inline void mask_ldb_interrupt(struct ntb_softc *ntb, unsigned int idx);
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static inline void unmask_ldb_interrupt(struct ntb_softc *ntb, unsigned int idx);
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static int ntb_create_callbacks(struct ntb_softc *ntb, uint32_t num_vectors);
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static void ntb_free_callbacks(struct ntb_softc *ntb);
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static struct ntb_hw_info *ntb_get_device_info(uint32_t device_id);
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@ -373,6 +374,16 @@ ntb_detach(device_t device)
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return (0);
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}
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static inline enum ntb_bar
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ntb_mw_to_bar(struct ntb_softc *ntb, unsigned mw)
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{
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KASSERT(mw < ntb->mw_count, ("%s: mw:%u > count:%u", __func__, mw,
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(unsigned)ntb->mw_count));
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return (NTB_B2B_BAR_1 + mw);
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}
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static int
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ntb_map_pci_bars(struct ntb_softc *ntb)
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{
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@ -651,10 +662,10 @@ ntb_setup_interrupts(struct ntb_softc *ntb)
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mask = 0;
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if (ntb->type == NTB_XEON)
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mask = (1 << XEON_DB_LINK);
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db_iowrite(ntb, ntb->reg_ofs.ldb_mask, ~mask);
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ntb_db_write(ntb, ntb->reg_ofs.ldb_mask, ~mask);
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num_vectors = desired_vectors = MIN(pci_msix_count(ntb->device),
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ntb->limits.max_db_bits);
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ntb->db_count);
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if (desired_vectors >= 1) {
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rc = pci_alloc_msix(ntb->device, &num_vectors);
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@ -675,34 +686,36 @@ ntb_setup_interrupts(struct ntb_softc *ntb)
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} else
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num_vectors = 1;
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/*
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* If allocating MSI-X interrupts succeeds, limit callbacks to the
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* number of MSI-X slots available.
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*/
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ntb_create_callbacks(ntb, num_vectors);
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if (ntb->type == NTB_XEON)
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rc = ntb_setup_xeon_msix(ntb, num_vectors);
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else
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rc = ntb_setup_soc_msix(ntb, num_vectors);
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if (rc != 0) {
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device_printf(ntb->device,
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"Error allocating MSI-X interrupts: %d\n", rc);
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if (ntb->type == NTB_XEON && num_vectors < ntb->db_vec_count) {
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/*
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* If allocating MSI-X interrupts failed and we're forced to
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* use legacy INTx anyway, the only limit on individual
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* callbacks is the number of doorbell bits.
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*
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* CEM: This seems odd to me but matches the behavior of the
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* Linux driver ca. September 2013
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*/
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ntb_free_callbacks(ntb);
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ntb_create_callbacks(ntb, ntb->limits.max_db_bits);
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}
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if (ntb->type == NTB_XEON && rc == ENOSPC)
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ntb->db_vec_count = 1;
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ntb->db_vec_shift = ntb->db_count;
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ntb_create_callbacks(ntb, ntb->db_count);
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rc = ntb_setup_legacy_interrupt(ntb);
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} else {
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ntb_create_callbacks(ntb, num_vectors);
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if (ntb->type == NTB_XEON)
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rc = ntb_setup_xeon_msix(ntb, num_vectors);
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else
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rc = ntb_setup_soc_msix(ntb, num_vectors);
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if (rc == 0 && ntb->type == NTB_XEON) {
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/*
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* Prevent consumers from registering callbacks on the link event irq
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* slot, from which they will never be called back.
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*/
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ntb->db_cb[num_vectors - 1].reserved = true;
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ntb->max_cbs--;
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}
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}
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if (rc != 0) {
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device_printf(ntb->device,
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"Error allocating interrupts: %d\n", rc);
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ntb_free_callbacks(ntb);
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}
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return (rc);
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}
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@ -759,8 +772,8 @@ ntb_teardown_interrupts(struct ntb_softc *ntb)
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* Doorbell register and mask are 64-bit on SoC, 16-bit on Xeon. Abstract it
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* out to make code clearer.
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*/
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static uint64_t
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db_ioread(struct ntb_softc *ntb, uint32_t regoff)
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static inline uint64_t
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ntb_db_read(struct ntb_softc *ntb, uint64_t regoff)
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{
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if (ntb->type == NTB_SOC)
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@ -771,8 +784,8 @@ db_ioread(struct ntb_softc *ntb, uint32_t regoff)
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return (ntb_reg_read(2, regoff));
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}
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static void
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db_iowrite(struct ntb_softc *ntb, uint32_t regoff, uint64_t val)
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static inline void
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ntb_db_write(struct ntb_softc *ntb, uint64_t regoff, uint64_t val)
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{
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if (ntb->type == NTB_SOC) {
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@ -789,9 +802,9 @@ mask_ldb_interrupt(struct ntb_softc *ntb, unsigned int idx)
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{
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uint64_t mask;
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mask = db_ioread(ntb, ntb->reg_ofs.ldb_mask);
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mask |= 1 << (idx * ntb->bits_per_vector);
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db_iowrite(ntb, ntb->reg_ofs.ldb_mask, mask);
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mask = ntb_db_read(ntb, ntb->reg_ofs.ldb_mask);
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mask |= 1 << (idx * ntb->db_vec_shift);
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ntb_db_write(ntb, ntb->reg_ofs.ldb_mask, mask);
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}
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static void
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@ -799,9 +812,9 @@ unmask_ldb_interrupt(struct ntb_softc *ntb, unsigned int idx)
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{
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uint64_t mask;
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mask = db_ioread(ntb, ntb->reg_ofs.ldb_mask);
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mask &= ~(1 << (idx * ntb->bits_per_vector));
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db_iowrite(ntb, ntb->reg_ofs.ldb_mask, mask);
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mask = ntb_db_read(ntb, ntb->reg_ofs.ldb_mask);
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mask &= ~(1 << (idx * ntb->db_vec_shift));
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ntb_db_write(ntb, ntb->reg_ofs.ldb_mask, mask);
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}
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static void
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@ -810,7 +823,7 @@ handle_soc_irq(void *arg)
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struct ntb_db_cb *db_cb = arg;
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struct ntb_softc *ntb = db_cb->ntb;
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db_iowrite(ntb, ntb->reg_ofs.ldb, (uint64_t) 1 << db_cb->db_num);
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ntb_db_write(ntb, ntb->reg_ofs.ldb, (uint64_t) 1 << db_cb->db_num);
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if (db_cb->callback != NULL) {
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mask_ldb_interrupt(ntb, db_cb->db_num);
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@ -830,9 +843,9 @@ handle_xeon_irq(void *arg)
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* vectors, with the 4th having a single bit for link
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* interrupts.
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*/
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db_iowrite(ntb, ntb->reg_ofs.ldb,
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((1 << ntb->bits_per_vector) - 1) <<
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(db_cb->db_num * ntb->bits_per_vector));
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ntb_db_write(ntb, ntb->reg_ofs.ldb,
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((1 << ntb->db_vec_shift) - 1) <<
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(db_cb->db_num * ntb->db_vec_shift));
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if (db_cb->callback != NULL) {
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mask_ldb_interrupt(ntb, db_cb->db_num);
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@ -852,7 +865,7 @@ handle_xeon_event_irq(void *arg)
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device_printf(ntb->device, "Error determining link status\n");
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/* bit 15 is always the link bit */
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db_iowrite(ntb, ntb->reg_ofs.ldb, 1 << XEON_DB_LINK);
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ntb_db_write(ntb, ntb->reg_ofs.ldb, 1 << XEON_DB_LINK);
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}
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static void
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@ -862,7 +875,7 @@ ntb_handle_legacy_interrupt(void *arg)
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unsigned int i;
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uint64_t ldb;
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ldb = db_ioread(ntb, ntb->reg_ofs.ldb);
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ldb = ntb_db_read(ntb, ntb->reg_ofs.ldb);
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if (ntb->type == NTB_XEON && (ldb & XEON_DB_LINK_BIT) != 0) {
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handle_xeon_event_irq(ntb);
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@ -900,10 +913,14 @@ ntb_free_callbacks(struct ntb_softc *ntb)
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{
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uint8_t i;
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if (ntb->db_cb == NULL)
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return;
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for (i = 0; i < ntb->max_cbs; i++)
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ntb_unregister_db_callback(ntb, i);
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free(ntb->db_cb, M_NTB);
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ntb->db_cb = NULL;
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ntb->max_cbs = 0;
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}
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@ -932,14 +949,14 @@ ntb_detect_max_mw(struct ntb_softc *ntb)
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{
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if (ntb->type == NTB_SOC) {
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ntb->limits.max_mw = SOC_MAX_MW;
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ntb->mw_count = SOC_MW_COUNT;
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return;
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}
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if (HAS_FEATURE(NTB_SPLIT_BAR))
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ntb->limits.max_mw = XEON_HSXSPLIT_MAX_MW;
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ntb->mw_count = XEON_HSX_SPLIT_MW_COUNT;
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else
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ntb->limits.max_mw = XEON_SNB_MAX_MW;
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ntb->mw_count = XEON_SNB_MW_COUNT;
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}
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static int
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@ -1020,7 +1037,7 @@ ntb_setup_xeon(struct ntb_softc *ntb)
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ntb->reg_ofs.rdb = XEON_B2B_DOORBELL_OFFSET;
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ntb->reg_ofs.spad_remote = XEON_B2B_SPAD_OFFSET;
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ntb->limits.max_spads = XEON_SPAD_COUNT;
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ntb->spad_count = XEON_SPAD_COUNT;
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break;
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case NTB_CONN_RP:
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@ -1063,7 +1080,7 @@ ntb_setup_xeon(struct ntb_softc *ntb)
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ntb_reg_write(8, XEON_PBAR4LMT_OFFSET,
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ntb_get_mw_size(ntb, 1) + 0x1000);
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/* Reserve the last MW for mapping remote spad */
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ntb->limits.max_mw--;
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ntb->mw_count--;
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} else
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/*
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* Disable the limit register, just in case it is set to
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@ -1076,9 +1093,9 @@ ntb_setup_xeon(struct ntb_softc *ntb)
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ntb->reg_ofs.lnk_stat = XEON_LINK_STATUS_OFFSET;
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ntb->reg_ofs.spci_cmd = XEON_PCICMD_OFFSET;
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ntb->limits.max_db_bits = XEON_DB_COUNT;
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ntb->limits.msix_cnt = XEON_DB_MSIX_VECTOR_COUNT;
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ntb->bits_per_vector = XEON_DB_MSIX_VECTOR_SHIFT;
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ntb->db_count = XEON_DB_COUNT;
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ntb->db_vec_count = XEON_DB_MSIX_VECTOR_COUNT;
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ntb->db_vec_shift = XEON_DB_MSIX_VECTOR_SHIFT;
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/*
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* HW Errata on bit 14 of b2bdoorbell register. Writes will not be
|
||||
@ -1091,7 +1108,7 @@ ntb_setup_xeon(struct ntb_softc *ntb)
|
||||
if (HAS_FEATURE(NTB_B2BDOORBELL_BIT14) &&
|
||||
!HAS_FEATURE(NTB_SDOORBELL_LOCKUP) &&
|
||||
ntb->conn_type == NTB_CONN_B2B)
|
||||
ntb->limits.max_db_bits = XEON_DB_COUNT - 1;
|
||||
ntb->db_count = XEON_DB_COUNT - 1;
|
||||
|
||||
configure_xeon_secondary_side_bars(ntb);
|
||||
|
||||
@ -1128,10 +1145,10 @@ ntb_setup_soc(struct ntb_softc *ntb)
|
||||
ntb->reg_ofs.spad_remote = SOC_B2B_SPAD_OFFSET;
|
||||
ntb->reg_ofs.spci_cmd = SOC_PCICMD_OFFSET;
|
||||
|
||||
ntb->limits.max_spads = SOC_SPAD_COUNT;
|
||||
ntb->limits.max_db_bits = SOC_DB_COUNT;
|
||||
ntb->limits.msix_cnt = SOC_DB_MSIX_VECTOR_COUNT;
|
||||
ntb->bits_per_vector = SOC_DB_MSIX_VECTOR_SHIFT;
|
||||
ntb->spad_count = SOC_SPAD_COUNT;
|
||||
ntb->db_count = SOC_DB_COUNT;
|
||||
ntb->db_vec_count = SOC_DB_MSIX_VECTOR_COUNT;
|
||||
ntb->db_vec_shift = SOC_DB_MSIX_VECTOR_SHIFT;
|
||||
|
||||
/*
|
||||
* FIXME - MSI-X bug on early SOC HW, remove once internal issue is
|
||||
@ -1648,7 +1665,7 @@ uint8_t
|
||||
ntb_get_max_spads(struct ntb_softc *ntb)
|
||||
{
|
||||
|
||||
return (ntb->limits.max_spads);
|
||||
return (ntb->spad_count);
|
||||
}
|
||||
|
||||
uint8_t
|
||||
@ -1659,10 +1676,10 @@ ntb_get_max_cbs(struct ntb_softc *ntb)
|
||||
}
|
||||
|
||||
uint8_t
|
||||
ntb_get_max_mw(struct ntb_softc *ntb)
|
||||
ntb_mw_count(struct ntb_softc *ntb)
|
||||
{
|
||||
|
||||
return (ntb->limits.max_mw);
|
||||
return (ntb->mw_count);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1680,7 +1697,7 @@ int
|
||||
ntb_write_local_spad(struct ntb_softc *ntb, unsigned int idx, uint32_t val)
|
||||
{
|
||||
|
||||
if (idx >= ntb->limits.max_spads)
|
||||
if (idx >= ntb->spad_count)
|
||||
return (EINVAL);
|
||||
|
||||
ntb_reg_write(4, ntb->reg_ofs.spad_local + idx * 4, val);
|
||||
@ -1703,7 +1720,7 @@ int
|
||||
ntb_read_local_spad(struct ntb_softc *ntb, unsigned int idx, uint32_t *val)
|
||||
{
|
||||
|
||||
if (idx >= ntb->limits.max_spads)
|
||||
if (idx >= ntb->spad_count)
|
||||
return (EINVAL);
|
||||
|
||||
*val = ntb_reg_read(4, ntb->reg_ofs.spad_local + idx * 4);
|
||||
@ -1726,7 +1743,7 @@ int
|
||||
ntb_write_remote_spad(struct ntb_softc *ntb, unsigned int idx, uint32_t val)
|
||||
{
|
||||
|
||||
if (idx >= ntb->limits.max_spads)
|
||||
if (idx >= ntb->spad_count)
|
||||
return (EINVAL);
|
||||
|
||||
if (HAS_FEATURE(NTB_SDOORBELL_LOCKUP))
|
||||
@ -1752,7 +1769,7 @@ int
|
||||
ntb_read_remote_spad(struct ntb_softc *ntb, unsigned int idx, uint32_t *val)
|
||||
{
|
||||
|
||||
if (idx >= ntb->limits.max_spads)
|
||||
if (idx >= ntb->spad_count)
|
||||
return (EINVAL);
|
||||
|
||||
if (HAS_FEATURE(NTB_SDOORBELL_LOCKUP))
|
||||
@ -1777,20 +1794,20 @@ void *
|
||||
ntb_get_mw_vbase(struct ntb_softc *ntb, unsigned int mw)
|
||||
{
|
||||
|
||||
if (mw >= ntb_get_max_mw(ntb))
|
||||
if (mw >= ntb_mw_count(ntb))
|
||||
return (NULL);
|
||||
|
||||
return (ntb->bar_info[NTB_MW_TO_BAR(mw)].vbase);
|
||||
return (ntb->bar_info[ntb_mw_to_bar(ntb, mw)].vbase);
|
||||
}
|
||||
|
||||
vm_paddr_t
|
||||
ntb_get_mw_pbase(struct ntb_softc *ntb, unsigned int mw)
|
||||
{
|
||||
|
||||
if (mw >= ntb_get_max_mw(ntb))
|
||||
if (mw >= ntb_mw_count(ntb))
|
||||
return (0);
|
||||
|
||||
return (ntb->bar_info[NTB_MW_TO_BAR(mw)].pbase);
|
||||
return (ntb->bar_info[ntb_mw_to_bar(ntb, mw)].pbase);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1806,10 +1823,10 @@ u_long
|
||||
ntb_get_mw_size(struct ntb_softc *ntb, unsigned int mw)
|
||||
{
|
||||
|
||||
if (mw >= ntb_get_max_mw(ntb))
|
||||
if (mw >= ntb_mw_count(ntb))
|
||||
return (0);
|
||||
|
||||
return (ntb->bar_info[NTB_MW_TO_BAR(mw)].size);
|
||||
return (ntb->bar_info[ntb_mw_to_bar(ntb, mw)].size);
|
||||
}
|
||||
|
||||
/**
|
||||
@ -1826,10 +1843,10 @@ void
|
||||
ntb_set_mw_addr(struct ntb_softc *ntb, unsigned int mw, uint64_t addr)
|
||||
{
|
||||
|
||||
if (mw >= ntb_get_max_mw(ntb))
|
||||
if (mw >= ntb_mw_count(ntb))
|
||||
return;
|
||||
|
||||
switch (NTB_MW_TO_BAR(mw)) {
|
||||
switch (ntb_mw_to_bar(ntb, mw)) {
|
||||
case NTB_B2B_BAR_1:
|
||||
ntb_reg_write(8, ntb->reg_ofs.bar2_xlat, addr);
|
||||
break;
|
||||
@ -1842,6 +1859,9 @@ ntb_set_mw_addr(struct ntb_softc *ntb, unsigned int mw, uint64_t addr)
|
||||
case NTB_B2B_BAR_3:
|
||||
ntb_reg_write(4, ntb->reg_ofs.bar5_xlat, addr);
|
||||
break;
|
||||
default:
|
||||
KASSERT(false, ("invalid BAR"));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1861,15 +1881,15 @@ ntb_ring_doorbell(struct ntb_softc *ntb, unsigned int db)
|
||||
if (ntb->type == NTB_SOC)
|
||||
bit = 1 << db;
|
||||
else
|
||||
bit = ((1 << ntb->bits_per_vector) - 1) <<
|
||||
(db * ntb->bits_per_vector);
|
||||
bit = ((1 << ntb->db_vec_shift) - 1) <<
|
||||
(db * ntb->db_vec_shift);
|
||||
|
||||
if (HAS_FEATURE(NTB_SDOORBELL_LOCKUP)) {
|
||||
ntb_mw_write(2, XEON_SHADOW_PDOORBELL_OFFSET, bit);
|
||||
return;
|
||||
}
|
||||
|
||||
db_iowrite(ntb, ntb->reg_ofs.rdb, bit);
|
||||
ntb_db_write(ntb, ntb->reg_ofs.rdb, bit);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -62,7 +62,7 @@ struct ntb_softc *ntb_register_transport(struct ntb_softc *ntb,
|
||||
void *transport);
|
||||
void ntb_unregister_transport(struct ntb_softc *ntb);
|
||||
uint8_t ntb_get_max_cbs(struct ntb_softc *ntb);
|
||||
uint8_t ntb_get_max_mw(struct ntb_softc *ntb);
|
||||
uint8_t ntb_mw_count(struct ntb_softc *ntb);
|
||||
uint8_t ntb_get_max_spads(struct ntb_softc *ntb);
|
||||
int ntb_write_local_spad(struct ntb_softc *ntb, unsigned int idx, uint32_t val);
|
||||
int ntb_read_local_spad(struct ntb_softc *ntb, unsigned int idx, uint32_t *val);
|
||||
|
@ -33,8 +33,8 @@
|
||||
#define NTB_LINK_SPEED_MASK 0x000f
|
||||
#define NTB_LINK_WIDTH_MASK 0x03f0
|
||||
|
||||
#define XEON_SNB_MAX_MW 2
|
||||
#define XEON_HSXSPLIT_MAX_MW 3
|
||||
#define XEON_SNB_MW_COUNT 2
|
||||
#define XEON_HSX_SPLIT_MW_COUNT 3
|
||||
/* Reserve the uppermost bit for link interrupt */
|
||||
#define XEON_DB_COUNT 15
|
||||
#define XEON_DB_LINK 15
|
||||
@ -79,7 +79,7 @@
|
||||
#define XEON_B2B_XLAT_OFFSETL 0x0144
|
||||
#define XEON_B2B_XLAT_OFFSETU 0x0148
|
||||
|
||||
#define SOC_MAX_MW 2
|
||||
#define SOC_MW_COUNT 2
|
||||
#define SOC_DB_COUNT 34
|
||||
#define SOC_DB_MSIX_VECTOR_COUNT 34
|
||||
#define SOC_DB_MSIX_VECTOR_SHIFT 1
|
||||
|
Loading…
Reference in New Issue
Block a user