Add definitions for Intel Speed Shift
These definitions will be used by a driver to implement Hardware P-States (autonomous control of HWP, via Intel Speed Shift technology). Reviewed by: kib Approved by: emaste (mentor) Differential Revision: https://reviews.freebsd.org/D18050
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@ -189,6 +189,12 @@
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#define CPUTPM1_SENSOR 0x00000001
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#define CPUTPM1_TURBO 0x00000002
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#define CPUTPM1_ARAT 0x00000004
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#define CPUTPM1_HWP 0x00000080
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#define CPUTPM1_HWP_NOTIFICATION 0x00000100
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#define CPUTPM1_HWP_ACTIVITY_WINDOW 0x00000200
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#define CPUTPM1_HWP_PERF_PREF 0x00000400
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#define CPUTPM1_HWP_PKG 0x00000800
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#define CPUTPM1_HWP_FLEXIBLE 0x00020000
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#define CPUTPM2_EFFREQ 0x00000001
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/* Intel Processor Trace CPUID. */
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@ -541,7 +547,14 @@
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#define MSR_DRAM_ENERGY_STATUS 0x619
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#define MSR_PP0_ENERGY_STATUS 0x639
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#define MSR_PP1_ENERGY_STATUS 0x641
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#define MSR_PPERF 0x64e
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#define MSR_TSC_DEADLINE 0x6e0 /* Writes are not serializing */
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#define MSR_IA32_PM_ENABLE 0x770
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#define MSR_IA32_HWP_CAPABILITIES 0x771
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#define MSR_IA32_HWP_REQUEST_PKG 0x772
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#define MSR_IA32_HWP_INTERRUPT 0x773
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#define MSR_IA32_HWP_REQUEST 0x774
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#define MSR_IA32_HWP_STATUS 0x777
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/*
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* VMX MSRs
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@ -718,6 +731,25 @@
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/* MSR IA32_FLUSH_CMD */
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#define IA32_FLUSH_CMD_L1D 0x00000001
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/* MSR IA32_HWP_CAPABILITIES */
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#define IA32_HWP_CAPABILITIES_HIGHEST_PERFORMANCE(x) (((x) >> 0) & 0xff)
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#define IA32_HWP_CAPABILITIES_GUARANTEED_PERFORMANCE(x) (((x) >> 8) & 0xff)
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#define IA32_HWP_CAPABILITIES_EFFICIENT_PERFORMANCE(x) (((x) >> 16) & 0xff)
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#define IA32_HWP_CAPABILITIES_LOWEST_PERFORMANCE(x) (((x) >> 24) & 0xff)
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/* MSR IA32_HWP_REQUEST */
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#define IA32_HWP_REQUEST_MINIMUM_VALID (1ULL << 63)
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#define IA32_HWP_REQUEST_MAXIMUM_VALID (1ULL << 62)
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#define IA32_HWP_REQUEST_DESIRED_VALID (1ULL << 61)
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#define IA32_HWP_REQUEST_EPP_VALID (1ULL << 60)
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#define IA32_HWP_REQUEST_ACTIVITY_WINDOW_VALID (1ULL << 59)
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#define IA32_HWP_REQUEST_PACKAGE_CONTROL (1ULL << 42)
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#define IA32_HWP_ACTIVITY_WINDOW (0x3ffULL << 32)
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#define IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE (0xffULL << 24)
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#define IA32_HWP_DESIRED_PERFORMANCE (0xffULL << 16)
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#define IA32_HWP_REQUEST_MAXIMUM_PERFORMANCE (0xffULL << 8)
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#define IA32_HWP_MINIMUM_PERFORMANCE (0xffULL << 0)
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/*
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* PAT modes.
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*/
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