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Improve support for Intel Lynx Point USB 3.0 controllers by using the

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USB 2.0 port mask in addition to the USB 3.0 port mask. The hardware
does not always accept when writing -1U to the port switching
registers.

MFC after:	3 days
Tested by:	Huang Wen Hui <huanghwh@gmail.com>
This commit is contained in:
Hans Petter Selasky 2014-07-16 06:14:41 +00:00
parent 4622bc4e31
commit 0a54509ff9
1 changed files with 6 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
sys/dev/usb/controller/xhci_pci.c
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@ -150,6 +150,8 @@ static int
xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
{
uint32_t temp;
uint32_t usb3_mask;
uint32_t usb2_mask;
temp = pci_read_config(self, PCI_XHCI_INTEL_USB3_PSSEN, 4) |
pci_read_config(self, PCI_XHCI_INTEL_XUSB2PR, 4);
@ -158,10 +160,11 @@ xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear)
temp &= ~clear;
/* Don't set bits which the hardware doesn't support */
temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
usb3_mask = pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4);
usb2_mask = pci_read_config(self, PCI_XHCI_INTEL_USB2PRM, 4);
pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4);
pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4);
pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp & usb3_mask, 4);
pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp & usb2_mask, 4);
device_printf(self, "Port routing mask set to 0x%08x\n", temp);