MFi386: r1.221: use simple timecounter that is aware of irq0 being off.
Approved by: re
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0b3c917109
commit
0b830ea12b
@ -127,6 +127,7 @@ static u_char rtc_statusb = RTCSB_24HR;
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static u_char timer2_state;
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static u_char timer2_state;
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static unsigned i8254_get_timecount(struct timecounter *tc);
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static unsigned i8254_simple_get_timecount(struct timecounter *tc);
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static void set_timer_freq(u_int freq, int intr_freq);
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static void set_timer_freq(u_int freq, int intr_freq);
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static struct timecounter i8254_timecounter = {
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static struct timecounter i8254_timecounter = {
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@ -518,10 +519,15 @@ set_timer_freq(u_int freq, int intr_freq)
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{
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{
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int new_timer0_max_count;
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int new_timer0_max_count;
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i8254_timecounter.tc_frequency = freq;
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mtx_lock_spin(&clock_lock);
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mtx_lock_spin(&clock_lock);
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timer_freq = freq;
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timer_freq = freq;
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new_timer0_max_count = hardclock_max_count = TIMER_DIV(intr_freq);
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new_timer0_max_count = hardclock_max_count = TIMER_DIV(intr_freq);
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if (new_timer0_max_count != timer0_max_count) {
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if (using_lapic_timer) {
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, 0);
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outb(TIMER_CNTR0, 0);
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} else if (new_timer0_max_count != timer0_max_count) {
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timer0_max_count = new_timer0_max_count;
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timer0_max_count = new_timer0_max_count;
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT);
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outb(TIMER_CNTR0, timer0_max_count & 0xff);
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outb(TIMER_CNTR0, timer0_max_count & 0xff);
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@ -575,7 +581,6 @@ startrtclock()
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}
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}
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set_timer_freq(timer_freq, hz);
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set_timer_freq(timer_freq, hz);
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i8254_timecounter.tc_frequency = timer_freq;
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tc_init(&i8254_timecounter);
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tc_init(&i8254_timecounter);
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init_TSC();
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init_TSC();
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@ -728,15 +733,21 @@ cpu_initclocks()
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/*
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/*
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* If we aren't using the local APIC timer to drive the kernel
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* If we aren't using the local APIC timer to drive the kernel
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* clocks, setup the interrupt handler for the 8254 timer 0 so
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* clocks, setup the interrupt handler for the 8254 timer 0 so
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* that it can drive hardclock().
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* that it can drive hardclock(). Otherwise, change the 8254
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* timecounter to user a simpler algorithm.
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*/
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*/
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if (!using_lapic_timer) {
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if (!using_lapic_timer || 1) {
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intr_add_handler("clk", 0, (driver_intr_t *)clkintr, NULL,
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intr_add_handler("clk", 0, (driver_intr_t *)clkintr, NULL,
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INTR_TYPE_CLK | INTR_FAST, NULL);
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INTR_TYPE_CLK | INTR_FAST, NULL);
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i8254_intsrc = intr_lookup_source(0);
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i8254_intsrc = intr_lookup_source(0);
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if (i8254_intsrc != NULL)
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if (i8254_intsrc != NULL)
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i8254_pending =
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i8254_pending =
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i8254_intsrc->is_pic->pic_source_pending;
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i8254_intsrc->is_pic->pic_source_pending;
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} else {
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i8254_timecounter.tc_get_timecount =
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i8254_simple_get_timecount;
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i8254_timecounter.tc_counter_mask = 0xffff;
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set_timer_freq(timer_freq, hz);
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}
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}
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/* Initialize RTC. */
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/* Initialize RTC. */
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@ -804,16 +815,32 @@ sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
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*/
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*/
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freq = timer_freq;
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freq = timer_freq;
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error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
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error = sysctl_handle_int(oidp, &freq, sizeof(freq), req);
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if (error == 0 && req->newptr != NULL) {
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if (error == 0 && req->newptr != NULL)
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set_timer_freq(freq, hz);
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set_timer_freq(freq, hz);
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i8254_timecounter.tc_frequency = freq;
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}
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return (error);
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return (error);
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}
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}
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SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
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SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
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0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
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0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", "");
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static unsigned
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i8254_simple_get_timecount(struct timecounter *tc)
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{
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u_int count;
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u_int high, low;
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mtx_lock_spin(&clock_lock);
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/* Select timer0 and latch counter value. */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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low = inb(TIMER_CNTR0);
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high = inb(TIMER_CNTR0);
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count = 0xffff - ((high << 8) | low);
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mtx_unlock_spin(&clock_lock);
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return (count);
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}
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static unsigned
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static unsigned
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i8254_get_timecount(struct timecounter *tc)
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i8254_get_timecount(struct timecounter *tc)
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{
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{
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