Replace the C implementation of __aeabi_read_tp with an assembly version.

This ensures we follow the ABI by preserving registers r1-r3.

Reviewed by:	jmallett, imp

lib/libc/arm/gen/Makefile.inc

@@ -3,4 +3,4 @@
 
 SRCS+=	_ctx_start.S _setjmp.S _set_tp.c alloca.S fabs.c \
 	getcontextx.c infinity.c ldexp.c makecontext.c \
-	__aeabi_read_tp.c setjmp.S signalcontext.c sigsetjmp.S divsi3.S flt_rounds.c
+	__aeabi_read_tp.S setjmp.S signalcontext.c sigsetjmp.S divsi3.S flt_rounds.c

lib/libc/arm/gen/__aeabi_read_tp.S

@@ -23,23 +23,18 @@
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
- *
- *	$FreeBSD$
  */
 
-#include <sys/cdefs.h>
+#include <machine/asm.h>
 __FBSDID("$FreeBSD$");
 
-#include <sys/types.h>
+#include <machine/sysarch.h>
 
-#include "machine/sysarch.h"
+ENTRY(__aeabi_read_tp)
+	ldr	r0, .Larm_tp_address
+	ldr	r0, [r0]
+	RET
 
-void *
-__aeabi_read_tp()
-{
-	void *_tp;
+.Larm_tp_address:
+	.word ARM_TP_ADDRESS
 
-	asm("ldr %0, [%1]\n" : "=r"(_tp) : "r"(ARM_TP_ADDRESS));
-
-	return _tp;
-}

sys/arm/include/armreg.h

@@ -316,8 +316,13 @@
 /*
  * Address of the vector page, low and high versions.
  */
+#ifndef __ASSEMBLER__
 #define	ARM_VECTORS_LOW		0x00000000U
 #define	ARM_VECTORS_HIGH	0xffff0000U
+#else
+#define	ARM_VECTORS_LOW		0
+#define	ARM_VECTORS_HIGH	0xffff0000
+#endif
 
 /*
  * ARM Instructions

sys/arm/include/sysarch.h

@@ -55,6 +55,7 @@
 #define ARM_RAS_END		(ARM_TP_ADDRESS + 8)
 
 #ifndef LOCORE
+#ifndef __ASSEMBLER__
 
 #include <sys/cdefs.h>
 
@@ -85,6 +86,7 @@ int	sysarch(int, void *);
 __END_DECLS
 #endif
 
+#endif /* __ASSEMBLER__ */
 #endif /* LOCORE */
 
 #endif /* !_ARM_SYSARCH_H_ */