- Enable support for building Configuration ROM.
- Improve probe message for S800 chips.
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d8406ada91
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@ -59,6 +59,13 @@
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#include <dev/firewire/iec13213.h>
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#include <dev/firewire/iec68113.h>
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struct crom_src_buf {
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struct crom_src src;
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struct crom_chunk root;
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struct crom_chunk vendor;
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struct crom_chunk hw;
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};
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int firewire_debug=0, try_bmr=1;
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SYSCTL_INT(_debug, OID_AUTO, firewire_debug, CTLFLAG_RW, &firewire_debug, 0,
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"FireWire driver debug flag");
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@ -467,6 +474,7 @@ firewire_detach( device_t dev )
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}
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free(sc->fc->topology_map, M_FW);
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free(sc->fc->speed_map, M_FW);
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free(sc->fc->crom_src_buf, M_FW);
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return(0);
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}
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#if 0
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@ -502,25 +510,11 @@ fw_drain_txq(struct firewire_comm *fc)
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fw_xferq_drain(fc->it[i]);
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}
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/*
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* Called after bus reset.
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*/
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void
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fw_busreset(struct firewire_comm *fc)
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static void
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fw_reset_csr(struct firewire_comm *fc)
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{
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struct firewire_dev_comm *fdc;
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device_t *devlistp;
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int devcnt;
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int i;
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switch(fc->status){
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case FWBUSMGRELECT:
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callout_stop(&fc->bmr_callout);
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break;
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default:
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break;
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}
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fc->status = FWBUSRESET;
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CSRARC(fc, STATE_CLEAR)
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= 1 << 23 | 0 << 17 | 1 << 16 | 1 << 15 | 1 << 14 ;
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CSRARC(fc, STATE_SET) = CSRARC(fc, STATE_CLEAR);
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@ -559,6 +553,93 @@ fw_busreset(struct firewire_comm *fc)
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CSRARC(fc, STATE_CLEAR) &= ~(1 << 23 | 1 << 15 | 1 << 14 );
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CSRARC(fc, STATE_SET) = CSRARC(fc, STATE_CLEAR);
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}
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static void
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fw_init_crom(struct firewire_comm *fc)
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{
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struct crom_src *src;
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fc->crom_src_buf = (struct crom_src_buf *)
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malloc(sizeof(struct crom_src_buf), M_FW, M_WAITOK | M_ZERO);
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if (fc->crom_src_buf == NULL)
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return;
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src = &fc->crom_src_buf->src;
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bzero(src, sizeof(struct crom_src));
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/* BUS info sample */
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src->hdr.info_len = 4;
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src->businfo.bus_name = CSR_BUS_NAME_IEEE1394;
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src->businfo.irmc = 1;
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src->businfo.cmc = 1;
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src->businfo.isc = 1;
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src->businfo.bmc = 1;
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src->businfo.pmc = 0;
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src->businfo.cyc_clk_acc = 100;
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src->businfo.max_rec = fc->maxrec;
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src->businfo.max_rom = MAXROM_4;
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src->businfo.generation = 0;
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src->businfo.link_spd = fc->speed;
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src->businfo.eui64.hi = fc->eui.hi;
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src->businfo.eui64.lo = fc->eui.lo;
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STAILQ_INIT(&src->chunk_list);
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fc->crom_src = src;
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fc->crom_root = &fc->crom_src_buf->root;
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}
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static void
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fw_reset_crom(struct firewire_comm *fc)
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{
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struct crom_src_buf *buf;
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struct crom_src *src;
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struct crom_chunk *root;
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if (fc->crom_src_buf == NULL)
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fw_init_crom(fc);
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buf = fc->crom_src_buf;
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src = fc->crom_src;
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root = fc->crom_root;
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src->businfo.generation ++;
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STAILQ_INIT(&src->chunk_list);
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bzero(root, sizeof(struct crom_chunk));
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crom_add_chunk(src, NULL, root, 0);
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crom_add_entry(root, CSRKEY_NCAP, 0x0083c0); /* XXX */
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/* private company_id */
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crom_add_entry(root, CSRKEY_VENDOR, CSRVAL_VENDOR_PRIVATE);
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crom_add_simple_text(src, root, &buf->vendor, "FreeBSD Project");
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crom_add_entry(root, CSRKEY_HW, __FreeBSD_version);
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crom_add_simple_text(src, root, &buf->hw, hostname);
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}
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/*
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* Called after bus reset.
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*/
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void
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fw_busreset(struct firewire_comm *fc)
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{
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struct firewire_dev_comm *fdc;
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device_t *devlistp;
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int i, devcnt;
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switch(fc->status){
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case FWBUSMGRELECT:
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callout_stop(&fc->bmr_callout);
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break;
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default:
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break;
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}
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fc->status = FWBUSRESET;
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fw_reset_csr(fc);
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fw_reset_crom(fc);
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if (device_get_children(fc->bdev, &devlistp, &devcnt) == 0) {
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for( i = 0 ; i < devcnt ; i++)
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@ -569,6 +650,8 @@ fw_busreset(struct firewire_comm *fc)
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}
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free(devlistp, M_TEMP);
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}
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crom_load(&fc->crom_src_buf->src, fc->config_rom, CROMSIZE);
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}
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/* Call once after reboot */
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@ -675,6 +758,7 @@ void fw_init(struct firewire_comm *fc)
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}
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#endif
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fc->crom_src_buf = NULL;
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#ifdef FW_VMACCESS
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xfer = fw_xfer_alloc();
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@ -143,6 +143,9 @@ struct firewire_comm{
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u_int32_t csr_arc[CSRSIZE/4];
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#define CROMSIZE 0x400
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u_int32_t *config_rom;
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struct crom_src_buf *crom_src_buf;
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struct crom_src *crom_src;
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struct crom_chunk *crom_root;
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struct fw_topology_map *topology_map;
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struct fw_speed_map *speed_map;
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struct callout busprobe_callout;
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@ -94,8 +94,8 @@ char fwohcicode[32][0x20]={
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"Undef","Undef","Undef","ack tardy",
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"Undef","ack data_err","ack type_err",""};
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#define MAX_SPEED 2
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extern char linkspeed[MAX_SPEED+1][0x10];
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#define MAX_SPEED 3
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extern char linkspeed[][0x10];
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u_int32_t tagbit[4] = { 1 << 28, 1 << 29, 1 << 30, 1 << 31};
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static struct tcode_info tinfo[] = {
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@ -648,7 +648,8 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
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return ENOMEM;
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}
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#if 1
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#if 0
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bzero(&sc->fc.config_rom[0], CROMSIZE);
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sc->fc.config_rom[1] = 0x31333934;
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sc->fc.config_rom[2] = 0xf000a002;
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sc->fc.config_rom[3] = OREAD(sc, OHCI_EUID_HI);
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@ -1761,6 +1762,8 @@ fwohci_intr_body(struct fwohci_softc *sc, u_int32_t stat, int count)
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OWRITE(sc, FWOHCI_INTSTATCLR, OHCI_INT_PHY_BUS_R);
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#endif
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fw_busreset(fc);
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OWRITE(sc, OHCI_CROMHDR, ntohl(sc->fc.config_rom[0]));
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OWRITE(sc, OHCI_BUS_OPT, ntohl(sc->fc.config_rom[2]));
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}
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busresetout:
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if((stat & OHCI_INT_DMA_IR )){
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