- Remove all the #if 0'd code that used to implement IRQ forwarding.
- Remove #if 0'd lazy interrupt mask.
This commit is contained in:
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d04125226c
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0bd8027e4a
@ -329,86 +329,6 @@ _Xcpuast:
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POP_FRAME
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iret
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#if 0
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/*
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* Executed by a CPU when it receives an XFORWARD_IRQ IPI.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xforward_irq
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_Xforward_irq:
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PUSH_FRAME
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movl $KDSEL, %eax
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mov %ax, %ds /* use KERNEL data segment */
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mov %ax, %es
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movl $KPSEL, %eax
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mov %ax, %fs
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movl $0, _lapic+LA_EOI /* End Of Interrupt to APIC */
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FAKE_MCOUNT(13*4(%esp))
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lock
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incl CNAME(forward_irq_hitcnt)
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cmpb $4, PCPU(INTR_NESTING_LEVEL)
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jae 1f
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incb PCPU(INTR_NESTING_LEVEL)
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sti
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MEXITCOUNT
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jmp doreti_next /* Handle forwarded interrupt */
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1:
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lock
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incl CNAME(forward_irq_toodeepcnt)
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MEXITCOUNT
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POP_FRAME
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iret
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/*
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*
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*/
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forward_irq:
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MCOUNT
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cmpl $0,_invltlb_ok
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jz 4f
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cmpl $0, CNAME(forward_irq_enabled)
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jz 4f
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/* XXX - this is broken now, because mp_lock doesn't exist
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movl _mp_lock,%eax
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cmpl $FREE_LOCK,%eax
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jne 1f
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*/
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movl $0, %eax /* Pick CPU #0 if noone has lock */
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1:
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shrl $24,%eax
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movl _cpu_num_to_apic_id(,%eax,4),%ecx
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shll $24,%ecx
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movl _lapic+LA_ICR_HI, %eax
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andl $~APIC_ID_MASK, %eax
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orl %ecx, %eax
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movl %eax, _lapic+LA_ICR_HI
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2:
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_DELSTAT_MASK,%eax
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jnz 2b
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_RESV2_MASK, %eax
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orl $(APIC_DEST_DESTFLD|APIC_DELMODE_FIXED|XFORWARD_IRQ_OFFSET), %eax
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movl %eax, _lapic+LA_ICR_LO
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3:
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_DELSTAT_MASK,%eax
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jnz 3b
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4:
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ret
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#endif
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -570,11 +490,6 @@ _Xrendezvous:
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.data
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#if 0
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/* active flag for lazy masking */
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iactive:
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.long 0
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#endif
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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@ -329,86 +329,6 @@ _Xcpuast:
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POP_FRAME
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iret
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#if 0
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/*
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* Executed by a CPU when it receives an XFORWARD_IRQ IPI.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xforward_irq
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_Xforward_irq:
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PUSH_FRAME
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movl $KDSEL, %eax
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mov %ax, %ds /* use KERNEL data segment */
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mov %ax, %es
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movl $KPSEL, %eax
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mov %ax, %fs
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movl $0, _lapic+LA_EOI /* End Of Interrupt to APIC */
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FAKE_MCOUNT(13*4(%esp))
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lock
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incl CNAME(forward_irq_hitcnt)
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cmpb $4, PCPU(INTR_NESTING_LEVEL)
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jae 1f
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incb PCPU(INTR_NESTING_LEVEL)
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sti
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MEXITCOUNT
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jmp doreti_next /* Handle forwarded interrupt */
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1:
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lock
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incl CNAME(forward_irq_toodeepcnt)
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MEXITCOUNT
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POP_FRAME
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iret
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/*
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*
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*/
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forward_irq:
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MCOUNT
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cmpl $0,_invltlb_ok
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jz 4f
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cmpl $0, CNAME(forward_irq_enabled)
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jz 4f
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/* XXX - this is broken now, because mp_lock doesn't exist
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movl _mp_lock,%eax
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cmpl $FREE_LOCK,%eax
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jne 1f
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*/
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movl $0, %eax /* Pick CPU #0 if noone has lock */
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1:
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shrl $24,%eax
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movl _cpu_num_to_apic_id(,%eax,4),%ecx
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shll $24,%ecx
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movl _lapic+LA_ICR_HI, %eax
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andl $~APIC_ID_MASK, %eax
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orl %ecx, %eax
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movl %eax, _lapic+LA_ICR_HI
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2:
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_DELSTAT_MASK,%eax
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jnz 2b
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_RESV2_MASK, %eax
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orl $(APIC_DEST_DESTFLD|APIC_DELMODE_FIXED|XFORWARD_IRQ_OFFSET), %eax
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movl %eax, _lapic+LA_ICR_LO
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3:
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_DELSTAT_MASK,%eax
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jnz 3b
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4:
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ret
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#endif
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -570,11 +490,6 @@ _Xrendezvous:
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.data
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#if 0
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/* active flag for lazy masking */
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iactive:
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.long 0
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#endif
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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@ -329,86 +329,6 @@ _Xcpuast:
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POP_FRAME
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iret
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#if 0
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/*
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* Executed by a CPU when it receives an XFORWARD_IRQ IPI.
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*/
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.text
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SUPERALIGN_TEXT
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.globl _Xforward_irq
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_Xforward_irq:
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PUSH_FRAME
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movl $KDSEL, %eax
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mov %ax, %ds /* use KERNEL data segment */
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mov %ax, %es
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movl $KPSEL, %eax
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mov %ax, %fs
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movl $0, _lapic+LA_EOI /* End Of Interrupt to APIC */
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FAKE_MCOUNT(13*4(%esp))
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lock
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incl CNAME(forward_irq_hitcnt)
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cmpb $4, PCPU(INTR_NESTING_LEVEL)
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jae 1f
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incb PCPU(INTR_NESTING_LEVEL)
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sti
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MEXITCOUNT
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jmp doreti_next /* Handle forwarded interrupt */
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1:
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lock
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incl CNAME(forward_irq_toodeepcnt)
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MEXITCOUNT
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POP_FRAME
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iret
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/*
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*
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*/
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forward_irq:
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MCOUNT
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cmpl $0,_invltlb_ok
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jz 4f
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cmpl $0, CNAME(forward_irq_enabled)
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jz 4f
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/* XXX - this is broken now, because mp_lock doesn't exist
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movl _mp_lock,%eax
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cmpl $FREE_LOCK,%eax
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jne 1f
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*/
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movl $0, %eax /* Pick CPU #0 if noone has lock */
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1:
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shrl $24,%eax
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movl _cpu_num_to_apic_id(,%eax,4),%ecx
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shll $24,%ecx
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movl _lapic+LA_ICR_HI, %eax
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andl $~APIC_ID_MASK, %eax
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orl %ecx, %eax
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movl %eax, _lapic+LA_ICR_HI
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2:
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_DELSTAT_MASK,%eax
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jnz 2b
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_RESV2_MASK, %eax
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orl $(APIC_DEST_DESTFLD|APIC_DELMODE_FIXED|XFORWARD_IRQ_OFFSET), %eax
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movl %eax, _lapic+LA_ICR_LO
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3:
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movl _lapic+LA_ICR_LO, %eax
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andl $APIC_DELSTAT_MASK,%eax
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jnz 3b
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4:
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ret
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#endif
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/*
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* Executed by a CPU when it receives an Xcpustop IPI from another CPU,
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*
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@ -570,11 +490,6 @@ _Xrendezvous:
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.data
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#if 0
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/* active flag for lazy masking */
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iactive:
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.long 0
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#endif
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#ifdef COUNT_XINVLTLB_HITS
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.globl _xhits
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