Add helper routines for PCI device drivers to read, write, and modify
PCI-Express capability registers (that is, PCI config registers in the standard PCI config space belonging to the PCI-Express capability register set). Note that all of the current PCI-e registers are either 16 or 32-bits, so only widths of 2 or 4 bytes are supported. Reviewed by: imp MFC after: 1 week Sponsored by: Chelsio Differential Revision: https://reviews.freebsd.org/D4088
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@ -1290,7 +1290,10 @@ MLINKS+=pci.9 pci_alloc_msi.9 \
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pci.9 pci_save_state.9 \
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pci.9 pci_set_powerstate.9 \
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pci.9 pci_set_max_read_req.9 \
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pci.9 pci_write_config.9
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pci.9 pci_write_config.9 \
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pci.9 pcie_adjust_config.9 \
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pci.9 pcie_read_config.9 \
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pci.9 pcie_write_config.9 \
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MLINKS+=pci_iov_schema.9 pci_iov_schema_alloc_node.9 \
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pci_iov_schema.9 pci_iov_schema_add_bool.9 \
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pci_iov_schema.9 pci_iov_schema_add_string.9 \
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@ -25,7 +25,7 @@
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 8, 2015
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.Dd November 5, 2015
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.Dt PCI 9
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.Os
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.Sh NAME
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@ -58,7 +58,10 @@
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.Nm pci_save_state ,
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.Nm pci_set_max_read_req ,
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.Nm pci_set_powerstate ,
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.Nm pci_write_config
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.Nm pci_write_config ,
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.Nm pcie_adjust_config ,
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.Nm pcie_read_config ,
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.Nm pcie_write_config
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.Nd PCI bus interface
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.Sh SYNOPSIS
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.In sys/bus.h
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@ -118,6 +121,18 @@
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.Fn pci_set_powerstate "device_t dev" "int state"
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.Ft void
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.Fn pci_write_config "device_t dev" "int reg" "uint32_t val" "int width"
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.Ft uint32_t
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.Fo pcie_adjust_config
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.Fa "device_t dev"
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.Fa "int reg"
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.Fa "uint32_t mask"
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.Fa "uint32_t val"
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.Fa "int width"
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.Fc
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.Ft uint32_t
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.Fn pcie_read_config "device_t dev" "int reg" "int width"
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.Ft void
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.Fn pcie_write_config "device_t dev" "int reg" "uint32_t val" "int width"
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.In dev/pci/pci_iov.h
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.Ft int
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.Fn pci_iov_attach "device_t dev" "nvlist_t *pf_schema" "nvlist_t *vf_schema"
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@ -159,6 +174,48 @@ with
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.Fa width
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specifying the size of the access.
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.Pp
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The
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.Fn pcie_adjust_config
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function is used to modify the value of a register in the PCI-express
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capability register set of device
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.Fa dev .
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The offset
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.Fa reg
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specifies a relative offset in the register set with
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.Fa width
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specifying the size of the access.
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The new value of the register is computed by modifying bits set in
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.Fa mask
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to the value in
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.Fa val .
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Any bits not specified in
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.Fa mask
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are preserved.
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The previous value of the register is returned.
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.Pp
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The
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.Fn pcie_read_config
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function is used to read the value of a register in the PCI-express
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capability register set of device
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.Fa dev .
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The offset
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.Fa reg
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specifies a relative offset in the register set with
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.Fa width
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specifying the size of the access.
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.Pp
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The
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.Fn pcie_write_config
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function is used to write the value
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.Fa val
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to a register in the PCI-express capability register set of device
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.Fa dev .
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The offset
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.Fa reg
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specifies a relative offset in the register set with
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.Fa width
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specifying the size of the access.
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.Pp
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.Em NOTE :
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Device drivers should only use these functions for functionality that
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is not available via another
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@ -1917,6 +1917,63 @@ pci_set_max_read_req(device_t dev, int size)
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return (size);
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}
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uint32_t
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pcie_read_config(device_t dev, int reg, int width)
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{
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struct pci_devinfo *dinfo = device_get_ivars(dev);
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int cap;
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cap = dinfo->cfg.pcie.pcie_location;
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if (cap == 0) {
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if (width == 2)
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return (0xffff);
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return (0xffffffff);
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}
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return (pci_read_config(dev, cap + reg, width));
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}
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void
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pcie_write_config(device_t dev, int reg, uint32_t value, int width)
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{
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struct pci_devinfo *dinfo = device_get_ivars(dev);
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int cap;
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cap = dinfo->cfg.pcie.pcie_location;
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if (cap == 0)
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return;
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pci_write_config(dev, cap + reg, value, width);
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}
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/*
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* Adjusts a PCI-e capability register by clearing the bits in mask
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* and setting the bits in (value & mask). Bits not set in mask are
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* not adjusted.
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*
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* Returns the old value on success or all ones on failure.
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*/
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uint32_t
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pcie_adjust_config(device_t dev, int reg, uint32_t mask, uint32_t value,
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int width)
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{
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struct pci_devinfo *dinfo = device_get_ivars(dev);
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uint32_t old, new;
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int cap;
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cap = dinfo->cfg.pcie.pcie_location;
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if (cap == 0) {
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if (width == 2)
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return (0xffff);
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return (0xffffffff);
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}
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old = pci_read_config(dev, cap + reg, width);
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new = old & ~mask;
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new |= (value & mask);
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pci_write_config(dev, cap + reg, new, width);
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return (old);
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}
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/*
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* Support for MSI message signalled interrupts.
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*/
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@ -551,6 +551,10 @@ int pci_get_max_read_req(device_t dev);
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void pci_restore_state(device_t dev);
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void pci_save_state(device_t dev);
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int pci_set_max_read_req(device_t dev, int size);
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uint32_t pcie_read_config(device_t dev, int reg, int width);
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void pcie_write_config(device_t dev, int reg, uint32_t value, int width);
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uint32_t pcie_adjust_config(device_t dev, int reg, uint32_t mask,
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uint32_t value, int width);
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#ifdef BUS_SPACE_MAXADDR
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