Add kernel support for the TP-LINK MR3020 Atheros MIPS 24k router.
AR9331 based system. Phabric: https://reviews.freebsd.org/D780 Reviewed by: adrian
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65
sys/mips/conf/TP-MR3020
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65
sys/mips/conf/TP-MR3020
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#
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# TP Link MR3020 - an AR9331 based SoC wifi device.
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#
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# This is for the 32 RAM/4 flash part. There is little to no
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# chance that this will ever boot FreeBSD directly from the 3.5MB
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# of flash. The kernel can fit into the space, but userland is just
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# too big even when stripped down to its limits.
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#
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# * AR9331 SoC
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# * 32MB RAM
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# * 4MB flash
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# * Integrated 1x1 2GHz wifi and 10/100 bridge
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# * USB powered
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# * USB storage
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#
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# $FreeBSD$
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#
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# Include the default AR933x parameters
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include "AR933X_BASE"
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ident TP-MR3020
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# Override hints with board values
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hints "TP-MR3020.hints"
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# Board memory - 32MB
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options AR71XX_REALMEM=(32*1024*1024)
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# i2c GPIO bus
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device gpioiic
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device iicbb
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device iicbus
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device iic
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# Options required for miiproxy and mdiobus
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options ARGE_MDIO # Export an MDIO bus separate from arge
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device miiproxy # MDIO bus <-> MII PHY rendezvous
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device etherswitch
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device arswitch
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# Enable the uboot environment stuff rather then the
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# redboot stuff.
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options AR71XX_ENV_UBOOT
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# uzip - to boot natively from flash
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device geom_uncompress
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# Used for the static uboot partition map
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device geom_map
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# Boot off of the rootfs, as defined in the geom_map setup.
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# Probably, this should be a USB device as the memory available
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# compressed rootfs is simply too small for FreeBSD
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#options ROOTDEVNAME=\"ufs:map/rootfs.uncompress\"
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# Boot off of a uboot tftp ramdisk kernel image. Because the flash
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# on this unit is so small, this is the only way to do dev work.
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# For full deployment, you will *have* to use a usb storage device
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# as a rootfs and use the flash to hold the kernel only.
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options MD_ROOT # md device usable as a potential root device
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options MD_ROOT_SIZE=10240
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makeoptions MFS_IMAGE=/tftpboot/mfsroot-tl-mr3020.img.ulzma
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options ROOTDEVNAME=\"ufs:md0.uncompress\"
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101
sys/mips/conf/TP-MR3020.hints
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sys/mips/conf/TP-MR3020.hints
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#
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# This file adds to the values in AR933X_BASE.hints
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#
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# $FreeBSD$
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# mdiobus on arge1
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x1a000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# There's no need to set the ar933x GMAC configuration bits.
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# This just creates a switch instance and correctly uses it.
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# Embedded Atheros Switch
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hint.arswitch.0.at="mdio0"
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# XXX this should really say it's an AR933x switch, as there
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# are some vlan specific differences here!
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hint.arswitch.0.is_7240=1
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hint.arswitch.0.numphys=4
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hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY
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hint.arswitch.0.is_rgmii=0
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hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII
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# arge0 - MII, autoneg, phy(4)
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hint.arge.0.phymask=0x10 # PHY4
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hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus
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# arge1 - GMII, 1000/full
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hint.arge.1.phymask=0x0 # No directly mapped PHYs
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hint.arge.1.media=1000
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hint.arge.1.fduplex=1
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# Where the ART is - last 64k in the flash
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# 0x9fff1000 ?
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hint.ath.0.eepromaddr=0x1fff0000
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hint.ath.0.eepromsize=16384
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# The board 16MiB flash layout in uboot env:
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#
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# 256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART)
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# However, it boots from 0x9f050000, which is the front of the flsah!
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# Thus the kernel/rootfs are switched around.
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# 256KB
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x00040000
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hint.map.0.name="uboot"
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hint.map.0.readonly=1
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# 64KB
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00040000
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hint.map.1.end=0x00050000
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hint.map.1.name="uboot-env"
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hint.map.1.readonly=0
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# 2752KB
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x00050000
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hint.map.2.end="search:0x00100000:0x10000:.!/bin/sh"
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hint.map.2.name="kernel"
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hint.map.2.readonly=0
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# 896KB
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hint.map.3.at="flash/spi0"
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hint.map.3.start="search:0x00100000:0x10000:.!/bin/sh"
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hint.map.3.end=0x003e0000
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hint.map.3.name="rootfs"
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hint.map.3.readonly=0
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# 64K NVRAM
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x003e0000
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hint.map.4.end=0x003f0000
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hint.map.4.name="cfg"
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hint.map.4.readonly=0
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# 64K ART
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hint.map.5.at="flash/spi0"
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hint.map.5.start=0x003f0000
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hint.map.5.end=0x00400000
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hint.map.5.name="art"
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hint.map.5.readonly=1
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# GPIO specific configuration block
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# Don't flip on anything that isn't already enabled.
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# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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# not used here.
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hint.gpio.0.function_set=0x00000000
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hint.gpio.0.function_clear=0x00000000
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# These are the GPIO LEDs and buttons which can be software controlled.
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#hint.gpio.0.pinmask=0x001c02ae
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#hint.gpio.0.pinmask=0x00001803
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# XXX TODO: the button and LEDs!
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