o add a bus space tag that forces a 2usec delay between r/w ops; this is
used for the optional GPS+RS485 uarts on the Gateworks Cambria boards which otherwise are unreliable o setup the hack bus space tag for the GPS+RS485 uarts o program the gpio interrupts for the uarts to be edge-rising o force timing on the expansion bus for the uarts to be "slow" Thanks to Chris Lang of Gateworks for these tips.
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sys/arm/xscale/ixp425/cambria_exp_space.c
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95
sys/arm/xscale/ixp425/cambria_exp_space.c
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@ -0,0 +1,95 @@
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/*-
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* Copyright (c) 2009 Sam Leffler. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Hack bus space tag for slow devices on the Cambria expansion bus;
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* we slow the timing and add a 2us delay between r/w ops.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <arm/xscale/ixp425/ixp425reg.h>
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#include <arm/xscale/ixp425/ixp425var.h>
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/* Prototypes for all the bus_space structure functions */
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bs_protos(exp);
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bs_protos(generic);
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bs_protos(generic_armv4);
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static uint8_t
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cambria_bs_r_1(void *t, bus_space_handle_t h, bus_size_t o)
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{
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DELAY(2);
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return bus_space_read_1((struct bus_space *)t, h, o);
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}
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static void
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cambria_bs_w_1(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
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{
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DELAY(2);
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bus_space_write_1((struct bus_space *)t, h, o, v);
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}
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/* NB: we only define what's needed by uart */
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struct bus_space cambria_exp_bs_tag = {
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/* mapping/unmapping */
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.bs_map = generic_bs_map,
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.bs_unmap = generic_bs_unmap,
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/* barrier */
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.bs_barrier = generic_bs_barrier,
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/* read (single) */
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.bs_r_1 = cambria_bs_r_1,
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/* write (single) */
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.bs_w_1 = cambria_bs_w_1,
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};
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void
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cambria_exp_bus_init(struct ixp425_softc *sc)
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{
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uint32_t cs3;
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KASSERT(cpu_is_ixp43x(), ("wrong cpu type"));
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cambria_exp_bs_tag.bs_cookie = sc->sc_iot;
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cs3 = EXP_BUS_READ_4(sc, EXP_TIMING_CS3_OFFSET);
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/* XXX force slowest possible timings and byte mode */
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EXP_BUS_WRITE_4(sc, EXP_TIMING_CS3_OFFSET,
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cs3 | (EXP_T1|EXP_T2|EXP_T3|EXP_T4|EXP_T5) | EXP_BYTE_EN);
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/* XXX force GPIO 3+4 for GPS+RS485 uarts */
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ixp425_set_gpio(sc, 3, GPIO_TYPE_EDG_RISING);
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ixp425_set_gpio(sc, 4, GPIO_TYPE_EDG_RISING);
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}
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@ -2,6 +2,7 @@
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arm/xscale/ixp425/avila_machdep.c standard
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arm/xscale/ixp425/avila_ata.c optional avila_ata
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arm/xscale/ixp425/avila_led.c optional avila_led
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arm/xscale/ixp425/cambria_led.c optional cambria_led
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arm/xscale/ixp425/cambria_exp_space.c standard
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arm/xscale/ixp425/cambria_fled.c optional cambria_fled
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arm/xscale/ixp425/cambria_led.c optional cambria_led
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arm/xscale/ixp425/ixdp425_pci.c optional pci
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@ -313,6 +313,17 @@ ixp425_attach(device_t dev)
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}
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arm_post_filter = ixp425_post_filter;
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if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE,
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0, &sc->sc_gpio_ioh))
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panic("%s: unable to map GPIO registers", __func__);
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if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
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0, &sc->sc_exp_ioh))
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panic("%s: unable to map Expansion Bus registers", __func__);
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/* XXX belongs in platform init */
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if (cpu_is_ixp43x())
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cambria_exp_bus_init(sc);
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if (bus_dma_tag_create(NULL, 1, 0, BUS_SPACE_MAXADDR_32BIT,
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BUS_SPACE_MAXADDR, NULL, NULL, 0xffffffff, 0xff, 0xffffffff, 0,
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NULL, NULL, &sc->sc_dmat))
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@ -339,13 +350,6 @@ ixp425_attach(device_t dev)
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/* attach wired devices via hints */
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bus_enumerate_hinted_children(dev);
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if (bus_space_map(sc->sc_iot, IXP425_GPIO_HWBASE, IXP425_GPIO_SIZE,
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0, &sc->sc_gpio_ioh))
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panic("%s: unable to map GPIO registers", __func__);
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if (bus_space_map(sc->sc_iot, IXP425_EXP_HWBASE, IXP425_EXP_SIZE,
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0, &sc->sc_exp_ioh))
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panic("%s: unable to map Expansion Bus registers", __func__);
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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@ -420,6 +424,7 @@ struct hwvtrans {
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uint32_t size;
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uint32_t vbase;
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int isa4x; /* XXX needs special bus space tag */
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int isslow; /* XXX needs special bus space tag */
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};
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static const struct hwvtrans *
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@ -453,10 +458,12 @@ gethwvtrans(uint32_t hwbase, uint32_t size)
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.vbase = IXP435_USB2_VBASE },
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{ .hwbase = CAMBRIA_GPS_HWBASE,
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.size = CAMBRIA_GPS_SIZE,
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.vbase = CAMBRIA_GPS_VBASE },
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.vbase = CAMBRIA_GPS_VBASE,
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.isslow = 1 },
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{ .hwbase = CAMBRIA_RS485_HWBASE,
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.size = CAMBRIA_RS485_SIZE,
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.vbase = CAMBRIA_RS485_VBASE },
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.vbase = CAMBRIA_RS485_VBASE,
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.isslow = 1 },
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};
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int i;
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@ -522,7 +529,8 @@ ixp425_alloc_resource(device_t dev, device_t child, int type, int *rid,
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device_printf(child,
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"%s: assign 0x%lx:0x%lx%s\n",
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__func__, start, end - start,
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vtrans->isa4x ? " A4X" : "");
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vtrans->isa4x ? " A4X" :
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vtrans->isslow ? " SLOW" : "");
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}
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} else
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vtrans = gethwvtrans(start, end - start);
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@ -578,6 +586,8 @@ ixp425_activate_resource(device_t dev, device_t child, int type, int rid,
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}
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if (vtrans->isa4x)
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rman_set_bustag(r, &ixp425_a4x_bs_tag);
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else if (vtrans->isslow)
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rman_set_bustag(r, &cambria_exp_bs_tag);
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else
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rman_set_bustag(r, sc->sc_iot);
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rman_set_bushandle(r, vtrans->vbase);
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@ -97,6 +97,9 @@ struct ixppcib_softc {
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extern struct bus_space ixp425_bs_tag;
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extern struct bus_space ixp425_a4x_bs_tag;
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extern struct bus_space cambria_exp_bs_tag;
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void cambria_exp_bus_init(struct ixp425_softc *);
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void ixp425_io_bs_init(bus_space_tag_t, void *);
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void ixp425_mem_bs_init(bus_space_tag_t, void *);
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