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- Use pci_enable_busmaster() to turn on busmaster.

Browse Source 
- Don't test memory/port status and emit an error message; the PCI bus
  will do this.

Reviewed by: sam
This commit is contained in:
kevlo 2007-10-23 04:25:43 +00:00
parent 7c82e0520d
commit 0daece515b
1 changed files with 10 additions and 35 deletions
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45
sys/dev/ath/if_ath_pci.c
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@ -88,36 +88,6 @@ ath_pci_probe(device_t dev)
return ENXIO;
}
static u_int32_t
ath_pci_setup(device_t dev)
{
u_int32_t cmd;
/*
* Enable memory mapping and bus mastering.
*/
cmd = pci_read_config(dev, PCIR_COMMAND, 4);
cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, cmd, 4);
cmd = pci_read_config(dev, PCIR_COMMAND, 4);
if ((cmd & PCIM_CMD_MEMEN) == 0) {
device_printf(dev, "failed to enable memory mapping\n");
return 0;
}
if ((cmd & PCIM_CMD_BUSMASTEREN) == 0) {
device_printf(dev, "failed to enable bus mastering\n");
return 0;
}
/*
* Disable retry timeout to keep PCI Tx retries from
* interfering with C3 CPU state.
*/
pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
return 1;
}
static int
ath_pci_attach(device_t dev)
{
@ -128,8 +98,16 @@ ath_pci_attach(device_t dev)
sc->sc_dev = dev;
if (!ath_pci_setup(dev))
goto bad;
/*
* Enable bus mastering.
*/
pci_enable_busmaster(dev);
/*
* Disable retry timeout to keep PCI Tx retries from
* interfering with C3 CPU state.
*/
pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1);
/*
* Setup memory-mapping of PCI registers.
@ -251,9 +229,6 @@ ath_pci_resume(device_t dev)
{
struct ath_pci_softc *psc = device_get_softc(dev);
if (!ath_pci_setup(dev))
return ENXIO;
ath_resume(&psc->sc_sc);
return (0);