Add support for controllers that doesn't have the usual taskfile

layout.  No functional changes.
This commit is contained in:
Søren Schmidt 2005-04-06 10:22:56 +00:00
parent 30a1695b11
commit 0e1eb6828c
8 changed files with 142 additions and 117 deletions

View File

@ -668,6 +668,20 @@ ata_identify(driver_t *driver, device_t parent, int type, const char *name)
ATA_LOCKING(parent, ATA_LF_UNLOCK);
}
void
ata_default_registers(struct ata_channel *ch)
{
/* fill in the defaults from whats setup already */
ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res;
ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset;
ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res;
ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset;
ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res;
ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset;
ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res;
ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset;
}
void
ata_udelay(int interval)
{

View File

@ -29,9 +29,24 @@
*/
/* ATA register defines */
#define ATA_DATA 0x00 /* data register */
#define ATA_DATA 0 /* (RW) data */
#define ATA_ERROR 0x01 /* (R) error register */
#define ATA_FEATURE 1 /* (W) feature */
#define ATA_F_DMA 0x01 /* enable DMA */
#define ATA_F_OVL 0x02 /* enable overlap */
#define ATA_COUNT 2 /* (W) sector count */
#define ATA_SECTOR 3 /* (RW) sector # */
#define ATA_CYL_LSB 4 /* (RW) cylinder# LSB */
#define ATA_CYL_MSB 5 /* (RW) cylinder# MSB */
#define ATA_DRIVE 6 /* (W) Sector/Drive/Head */
#define ATA_D_LBA 0x40 /* use LBA addressing */
#define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */
#define ATA_COMMAND 7 /* (W) command */
#define ATA_ERROR 8 /* (R) error */
#define ATA_E_ILI 0x01 /* illegal length */
#define ATA_E_NM 0x02 /* no media */
#define ATA_E_ABORT 0x04 /* command aborted */
@ -59,27 +74,14 @@
#define ATA_SK_MISCOMPARE 0xe0 /* data dont match the medium */
#define ATA_SK_RESERVED 0xf0
#define ATA_FEATURE 0x01 /* (W) feature register */
#define ATA_F_DMA 0x01 /* enable DMA */
#define ATA_F_OVL 0x02 /* enable overlap */
#define ATA_COUNT 0x02 /* (W) sector count */
#define ATA_IREASON 0x02 /* (R) interrupt reason */
#define ATA_IREASON 9 /* (R) interrupt reason */
#define ATA_I_CMD 0x01 /* cmd (1) | data (0) */
#define ATA_I_IN 0x02 /* read (1) | write (0) */
#define ATA_I_RELEASE 0x04 /* released bus (1) */
#define ATA_I_TAGMASK 0xf8 /* tag mask */
#define ATA_SECTOR 0x03 /* sector # */
#define ATA_CYL_LSB 0x04 /* cylinder# LSB */
#define ATA_CYL_MSB 0x05 /* cylinder# MSB */
#define ATA_DRIVE 0x06 /* Sector/Drive/Head register */
#define ATA_D_LBA 0x40 /* use LBA addressing */
#define ATA_D_IBM 0xa0 /* 512 byte sectors, ECC */
#define ATA_CMD 0x07 /* command register */
#define ATA_STATUS 0x07 /* status register */
#define ATA_STATUS 10 /* (R) status */
#define ATA_ALTSTAT 11 /* (R) alternate status */
#define ATA_S_ERROR 0x01 /* error */
#define ATA_S_INDEX 0x02 /* index */
#define ATA_S_CORR 0x04 /* data corrected */
@ -91,10 +93,11 @@
#define ATA_S_READY 0x40 /* drive ready */
#define ATA_S_BUSY 0x80 /* busy */
#define ATA_ALTSTAT 0x08 /* alternate status register */
#define ATA_ALTOFFSET 0x206 /* alternate registers offset */
#define ATA_PCCARD_ALTOFFSET 0x0e /* do for PCCARD devices */
#define ATA_PC98_ALTOFFSET 0x10c /* do for PC98 devices */
#define ATA_CONTROL 12 /* (W) control */
#define ATA_CTLOFFSET 0x206 /* control register offset */
#define ATA_PCCARD_CTLOFFSET 0x0e /* do for PCCARD devices */
#define ATA_PC98_CTLOFFSET 0x10c /* do for PC98 devices */
#define ATA_A_IDS 0x02 /* disable interrupts */
#define ATA_A_RESET 0x04 /* RESET controller */
#define ATA_A_4BIT 0x08 /* 4 head bits */
@ -116,13 +119,13 @@
#define ATA_PC98_BANK 0x432
#define ATA_IOSIZE 0x08
#define ATA_PC98_IOSIZE 0x10
#define ATA_ALTIOSIZE 0x01
#define ATA_CTLIOSIZE 0x01
#define ATA_BMIOSIZE 0x08
#define ATA_PC98_BANKIOSIZE 0x01
#define ATA_IOADDR_RID 0
#define ATA_ALTADDR_RID 1
#define ATA_CTLADDR_RID 1
#define ATA_BMADDR_RID 0x20
#define ATA_PC98_ALTADDR_RID 8
#define ATA_PC98_CTLADDR_RID 8
#define ATA_PC98_BANKADDR_RID 9
#define ATA_IRQ_RID 0
@ -132,12 +135,12 @@
#define ATA_DMA_ENTRIES 256
#define ATA_DMA_EOT 0x80000000
#define ATA_BMCMD_PORT 0x09
#define ATA_BMCMD_PORT 13
#define ATA_BMCMD_START_STOP 0x01
#define ATA_BMCMD_WRITE_READ 0x08
#define ATA_BMDEVSPEC_0 0x0a
#define ATA_BMSTAT_PORT 0x0b
#define ATA_BMDEVSPEC_0 14
#define ATA_BMSTAT_PORT 15
#define ATA_BMSTAT_ACTIVE 0x01
#define ATA_BMSTAT_ERROR 0x02
#define ATA_BMSTAT_INTERRUPT 0x04
@ -146,12 +149,12 @@
#define ATA_BMSTAT_DMA_SLAVE 0x40
#define ATA_BMSTAT_DMA_SIMPLEX 0x80
#define ATA_BMDEVSPEC_1 0x0c
#define ATA_BMDTP_PORT 0x0d
#define ATA_BMDEVSPEC_1 16
#define ATA_BMDTP_PORT 17
#define ATA_IDX_ADDR 0x0e
#define ATA_IDX_DATA 0x0f
#define ATA_MAX_RES 0x10
#define ATA_IDX_ADDR 18
#define ATA_IDX_DATA 19
#define ATA_MAX_RES 20
#define ATA_INTR_FLAGS (INTR_MPSAFE|INTR_TYPE_BIO|INTR_ENTROPY)
#define ATA_OP_CONTINUES 0
@ -252,7 +255,7 @@ struct ata_request {
};
/* define this for debugging request processing */
#if 1
#if 0
#define ATA_DEBUG_RQ(request, string) \
{ \
if (request->flags & ATA_R_DEBUG) \
@ -395,6 +398,7 @@ int ata_reinit(device_t dev);
int ata_suspend(device_t dev);
int ata_resume(device_t dev);
void ata_identify(driver_t *driver, device_t parent, int type, const char *name);
void ata_default_registers(struct ata_channel *ch);
void ata_udelay(int interval);
char *ata_mode2str(int mode);
int ata_pmode(struct ata_params *ap);

View File

@ -90,7 +90,7 @@ static int
ata_pccard_probe(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
struct resource *io, *altio;
struct resource *io, *ctlio;
int i, rid;
/* allocate the io range to get start and length */
@ -101,32 +101,34 @@ ata_pccard_probe(device_t dev)
return ENXIO;
/* setup the resource vectors */
for (i = ATA_DATA; i <= ATA_STATUS; i++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
ch->r_io[i].res = io;
ch->r_io[i].offset = i;
}
ch->r_io[ATA_IDX_ADDR].res = io;
/*
* if we got more than the default ATA_IOSIZE ports, this is a device
* where altio is located at offset 14 into "normal" io space.
* where ctlio is located at offset 14 into "normal" io space.
*/
if (rman_get_size(io) > ATA_IOSIZE) {
ch->r_io[ATA_ALTSTAT].res = io;
ch->r_io[ATA_ALTSTAT].offset = 14;
ch->r_io[ATA_CONTROL].res = io;
ch->r_io[ATA_CONTROL].offset = 14;
}
else {
rid = ATA_ALTADDR_RID;
altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0,
ATA_ALTIOSIZE, RF_ACTIVE);
if (!altio) {
rid = ATA_CTLADDR_RID;
ctlio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0,
ATA_CTLIOSIZE, RF_ACTIVE);
if (!ctlio) {
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
for (i = ATA_DATA; i < ATA_MAX_RES; i++)
ch->r_io[i].res = NULL;
return ENXIO;
}
ch->r_io[ATA_ALTSTAT].res = altio;
ch->r_io[ATA_ALTSTAT].offset = 0;
ch->r_io[ATA_CONTROL].res = ctlio;
ch->r_io[ATA_CONTROL].offset = 0;
}
ata_default_registers(ch);
/* initialize softc for this channel */
ch->unit = 0;
@ -142,9 +144,9 @@ ata_pccard_detach(device_t dev)
int i;
ata_detach(dev);
if (ch->r_io[ATA_ALTSTAT].res != ch->r_io[ATA_DATA].res)
bus_release_resource(dev, SYS_RES_IOPORT, ATA_ALTADDR_RID,
ch->r_io[ATA_ALTSTAT].res);
if (ch->r_io[ATA_CONTROL].res != ch->r_io[ATA_DATA].res)
bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID,
ch->r_io[ATA_CONTROL].res);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID,
ch->r_io[ATA_DATA].res);
for (i = ATA_DATA; i < ATA_MAX_RES; i++)

View File

@ -51,7 +51,7 @@ __FBSDID("$FreeBSD$");
/* local vars */
struct ata_cbus_controller {
struct resource *io;
struct resource *altio;
struct resource *ctlio;
struct resource *bankio;
struct resource *irq;
void *ih;
@ -88,10 +88,10 @@ ata_cbus_probe(device_t dev)
return ENOMEM;
/* calculate & set the altport range */
rid = ATA_PC98_ALTADDR_RID;
rid = ATA_PC98_CTLADDR_RID;
if (bus_get_resource(dev, SYS_RES_IOPORT, rid, &tmp, &tmp)) {
bus_set_resource(dev, SYS_RES_IOPORT, rid,
rman_get_start(io)+ATA_PC98_ALTOFFSET, ATA_ALTIOSIZE);
rman_get_start(io)+ATA_PC98_CTLOFFSET, ATA_CTLIOSIZE);
}
/* calculate & set the bank range */
@ -118,12 +118,12 @@ ata_cbus_attach(device_t dev)
if (!ctlr->io)
return ENOMEM;
rid = ATA_PC98_ALTADDR_RID;
ctlr->altio =
rid = ATA_PC98_CTLADDR_RID;
ctlr->ctlio =
bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
rman_get_start(ctlr->io) + ATA_PC98_ALTOFFSET, ~0,
ATA_ALTIOSIZE, RF_ACTIVE);
if (!ctlr->altio) {
rman_get_start(ctlr->io) + ATA_PC98_CTLOFFSET, ~0,
ATA_CTLIOSIZE, RF_ACTIVE);
if (!ctlr->ctlio) {
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, ctlr->io);
return ENOMEM;
}
@ -134,7 +134,7 @@ ata_cbus_attach(device_t dev)
ATA_PC98_BANKIOSIZE, RF_ACTIVE);
if (!ctlr->bankio) {
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, ctlr->io);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_ALTADDR_RID, ctlr->altio);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID, ctlr->ctlio);
return ENOMEM;
}
@ -143,7 +143,7 @@ ata_cbus_attach(device_t dev)
RF_ACTIVE | RF_SHAREABLE))) {
device_printf(dev, "unable to alloc interrupt\n");
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, ctlr->io);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_ALTADDR_RID, ctlr->altio);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID, ctlr->ctlio);
bus_release_resource(dev, SYS_RES_IOPORT,
ATA_PC98_BANKADDR_RID, ctlr->bankio);
return ENXIO;
@ -153,7 +153,7 @@ ata_cbus_attach(device_t dev)
ata_cbus_intr, ctlr, &ctlr->ih))) {
device_printf(dev, "unable to setup interrupt\n");
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, ctlr->io);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_ALTADDR_RID, ctlr->altio);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID, ctlr->ctlio);
bus_release_resource(dev, SYS_RES_IOPORT,
ATA_PC98_BANKADDR_RID, ctlr->bankio);
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IRQ_RID, ctlr->irq);
@ -183,8 +183,8 @@ ata_cbus_alloc_resource(device_t dev, device_t child, int type, int *rid,
switch (*rid) {
case ATA_IOADDR_RID:
return ctlr->io;
case ATA_ALTADDR_RID:
return ctlr->altio;
case ATA_CTLADDR_RID:
return ctlr->ctlio;
}
}
if (type == SYS_RES_IRQ)
@ -275,12 +275,14 @@ ata_cbuschannel_probe(device_t dev)
free(children, M_TEMP);
/* setup the resource vectors */
for (i = ATA_DATA; i <= ATA_STATUS; i ++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
ch->r_io[i].res = ctlr->io;
ch->r_io[i].offset = i << 1;
}
ch->r_io[ATA_ALTSTAT].res = ctlr->altio;
ch->r_io[ATA_ALTSTAT].offset = 0;
ch->r_io[ATA_CONTROL].res = ctlr->ctlio;
ch->r_io[ATA_CONTROL].offset = 0;
ch->r_io[ATA_IDX_ADDR].res = ctlr->io;
ata_default_registers(ch);
/* initialize softc for this channel */
ch->flags |= ATA_USE_16BIT;

View File

@ -471,7 +471,7 @@ ata_ali_allocate(device_t dev)
device_t parent = device_get_parent(dev);
struct ata_pci_controller *ctlr = device_get_softc(parent);
struct ata_channel *ch = device_get_softc(dev);
struct resource *io = NULL, *altio = NULL;
struct resource *io = NULL, *ctlio = NULL;
int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2);
int i, rid;
@ -481,22 +481,20 @@ ata_ali_allocate(device_t dev)
return ENXIO;
rid = PCIR_BAR(1) + (unit01 ? 8 : 0);
altio = bus_alloc_resource_any(parent, SYS_RES_IOPORT, &rid, RF_ACTIVE);
if (!altio) {
ctlio = bus_alloc_resource_any(parent, SYS_RES_IOPORT, &rid, RF_ACTIVE);
if (!ctlio) {
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
return ENXIO;
}
for (i = ATA_DATA; i <= ATA_STATUS; i ++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
ch->r_io[i].res = io;
ch->r_io[i].offset = i + (unit10 ? 8 : 0);
}
ch->r_io[ATA_ALTSTAT].res = altio;
ch->r_io[ATA_ALTSTAT].offset = 2 + (unit10 ? 4 : 0);
ch->r_io[ATA_CONTROL].res = ctlio;
ch->r_io[ATA_CONTROL].offset = 2 + (unit10 ? 4 : 0);
ch->r_io[ATA_IDX_ADDR].res = io;
ch->flags |= ATA_NO_SLAVE;
ata_default_registers(ch);
if (ctlr->r_res1) {
for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
ch->r_io[i].res = ctlr->r_res1;
@ -504,6 +502,7 @@ ata_ali_allocate(device_t dev)
}
}
ch->flags |= ATA_NO_SLAVE;
ata_generic_hw(ch);
return 0;
}
@ -1652,15 +1651,16 @@ ata_promise_mio_allocate(device_t dev)
int offset = (ctlr->chip->cfg2 & PRSX4X) ? 0x000c0000 : 0;
int i;
for (i = ATA_DATA; i <= ATA_STATUS; i++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
ch->r_io[i].res = ctlr->r_res2;
ch->r_io[i].offset = offset + 0x0200 + (i << 2) + (ch->unit << 7);
}
ch->r_io[ATA_ALTSTAT].res = ctlr->r_res2;
ch->r_io[ATA_ALTSTAT].offset = offset + 0x0238 + (ch->unit << 7);
ch->r_io[ATA_CONTROL].res = ctlr->r_res2;
ch->r_io[ATA_CONTROL].offset = offset + 0x0238 + (ch->unit << 7);
ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
ch->flags |= ATA_USE_16BIT;
ata_default_registers(ch);
ch->flags |= ATA_USE_16BIT;
if ((ctlr->chip->cfg2 & (PRSATA | PRSATA2)) ||
((ctlr->chip->cfg2 & (PRCMBO | PRCMBO2)) && ch->unit < 2))
ch->flags |= ATA_NO_SLAVE;
@ -2148,7 +2148,7 @@ ata_promise_apkt(u_int8_t *bytep, struct ata_device *atadev, u_int8_t command,
bytep[i++] = (atadev->flags & ATA_D_USE_CHS ? 0 : ATA_D_LBA) |
ATA_D_IBM | atadev->unit | ((lba >> 24) & 0xf);
}
bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_END | ATA_CMD;
bytep[i++] = ATA_PDC_1B | ATA_PDC_WRITE_END | ATA_COMMAND;
bytep[i++] = command;
return i;
}
@ -2625,12 +2625,14 @@ ata_sii_allocate(device_t dev)
int unit01 = (ch->unit & 1), unit10 = (ch->unit & 2);
int i;
for (i = ATA_DATA; i <= ATA_STATUS; i++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
ch->r_io[i].res = ctlr->r_res2;
ch->r_io[i].offset = 0x80 + i + (unit01 << 6) + (unit10 << 8);
}
ch->r_io[ATA_ALTSTAT].res = ctlr->r_res2;
ch->r_io[ATA_ALTSTAT].offset = 0x8a + (unit01 << 6) + (unit10 << 8);
ch->r_io[ATA_CONTROL].res = ctlr->r_res2;
ch->r_io[ATA_CONTROL].offset = 0x8a + (unit01 << 6) + (unit10 << 8);
ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
ata_default_registers(ch);
ch->r_io[ATA_BMCMD_PORT].res = ctlr->r_res2;
ch->r_io[ATA_BMCMD_PORT].offset = 0x00 + (unit01 << 3) + (unit10 << 8);
ch->r_io[ATA_BMSTAT_PORT].res = ctlr->r_res2;
@ -2641,7 +2643,6 @@ ata_sii_allocate(device_t dev)
ch->r_io[ATA_BMDEVSPEC_0].offset = 0xa1 + (unit01 << 6) + (unit10 << 8);
ch->r_io[ATA_BMDEVSPEC_1].res = ctlr->r_res2;
ch->r_io[ATA_BMDEVSPEC_1].offset = 0x100 + (unit01 << 7) + (unit10 << 8);
ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
if (ctlr->chip->max_dma >= ATA_SA150) {
ch->flags |= ATA_NO_SLAVE;

View File

@ -62,7 +62,7 @@ static int
ata_isa_probe(device_t dev)
{
struct ata_channel *ch = device_get_softc(dev);
struct resource *io = NULL, *altio = NULL;
struct resource *io = NULL, *ctlio = NULL;
u_long tmp;
int i, rid;
@ -78,28 +78,30 @@ ata_isa_probe(device_t dev)
return ENXIO;
/* set the altport range */
if (bus_get_resource(dev, SYS_RES_IOPORT, ATA_ALTADDR_RID, &tmp, &tmp)) {
bus_set_resource(dev, SYS_RES_IOPORT, ATA_ALTADDR_RID,
rman_get_start(io) + ATA_ALTOFFSET, ATA_ALTIOSIZE);
if (bus_get_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID, &tmp, &tmp)) {
bus_set_resource(dev, SYS_RES_IOPORT, ATA_CTLADDR_RID,
rman_get_start(io) + ATA_CTLOFFSET, ATA_CTLIOSIZE);
}
/* allocate the altport range */
rid = ATA_ALTADDR_RID;
altio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0,
ATA_ALTIOSIZE, RF_ACTIVE);
if (!altio) {
rid = ATA_CTLADDR_RID;
ctlio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0,
ATA_CTLIOSIZE, RF_ACTIVE);
if (!ctlio) {
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
return ENXIO;
}
/* setup the resource vectors */
for (i = ATA_DATA; i <= ATA_STATUS; i++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i++) {
ch->r_io[i].res = io;
ch->r_io[i].offset = i;
}
ch->r_io[ATA_ALTSTAT].res = altio;
ch->r_io[ATA_ALTSTAT].offset = 0;
ch->r_io[ATA_CONTROL].res = ctlio;
ch->r_io[ATA_CONTROL].offset = 0;
ch->r_io[ATA_IDX_ADDR].res = io;
ata_default_registers(ch);
/* initialize softc for this channel */
ch->unit = 0;
ch->flags |= ATA_USE_16BIT;

View File

@ -80,7 +80,7 @@ ata_getparam(device_t parent, struct ata_device *atadev, u_int8_t command)
ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | atadev->unit);
/* disable interrupt */
ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_4BIT | ATA_A_IDS);
ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_4BIT | ATA_A_IDS);
/* ready to issue command ? */
if ((error = ata_wait(ch, atadev, 0)) < 0) {
@ -96,7 +96,7 @@ ata_getparam(device_t parent, struct ata_device *atadev, u_int8_t command)
ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | atadev->unit);
/* issue command */
ATA_IDX_OUTB(ch, ATA_CMD, command);
ATA_IDX_OUTB(ch, ATA_COMMAND, command);
} while (ata_wait(ch, atadev, ATA_S_DRQ));
@ -251,7 +251,7 @@ ata_begin_transaction(struct ata_request *request)
if (request->u.atapi.ccb[0] == ATAPI_POLL_DSC) {
ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | atadev->unit);
DELAY(10);
if (!(ATA_IDX_INB(ch, ATA_ALTSTAT)&ATA_S_DSC))
if (!(ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_DSC))
request->result = EBUSY;
break;
}
@ -302,7 +302,7 @@ ata_begin_transaction(struct ata_request *request)
if (request->u.atapi.ccb[0] == ATAPI_POLL_DSC) {
ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | atadev->unit);
DELAY(10);
if (!(ATA_IDX_INB(ch, ATA_ALTSTAT)&ATA_S_DSC))
if (!(ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_DSC))
request->result = EBUSY;
break;
}
@ -597,7 +597,7 @@ ata_end_transaction(struct ata_request *request)
}
/* disable interrupt */
//ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_4BIT | ATA_A_IDS);
//ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_4BIT | ATA_A_IDS);
return ATA_OP_FINISHED;
}
@ -654,9 +654,9 @@ ata_generic_reset(struct ata_channel *ch)
/* reset (both) devices on this channel */
ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | ATA_MASTER);
DELAY(10);
ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS | ATA_A_RESET);
ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS | ATA_A_RESET);
ata_udelay(10000);
ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_IDS);
ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS);
ata_udelay(100000);
ATA_IDX_INB(ch, ATA_ERROR);
@ -811,7 +811,7 @@ ata_generic_command(struct ata_device *atadev, u_int8_t command,
}
/* enable interrupt */
ATA_IDX_OUTB(ch, ATA_ALTSTAT, ATA_A_4BIT);
ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_4BIT);
/* only use 48bit addressing if needed (avoid bugs and overhead) */
if ((lba >= ATA_MAX_28BIT_LBA || count > 256) &&
@ -885,7 +885,7 @@ ata_generic_command(struct ata_device *atadev, u_int8_t command,
}
/* issue command to controller */
ATA_IDX_OUTB(ch, ATA_CMD, command);
ATA_IDX_OUTB(ch, ATA_COMMAND, command);
return 0;
}

View File

@ -263,10 +263,10 @@ ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
start, end, count, flags);
break;
case ATA_ALTADDR_RID:
case ATA_CTLADDR_RID:
if (ata_legacy(dev)) {
start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_ALTOFFSET;
count = ATA_ALTIOSIZE;
start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET;
count = ATA_CTLIOSIZE;
end = start + count - 1;
}
myrid = PCIR_BAR(1) + (unit << 3);
@ -309,7 +309,7 @@ ata_pci_release_resource(device_t dev, device_t child, int type, int rid,
PCIR_BAR(0) + (unit << 3), r);
break;
case ATA_ALTADDR_RID:
case ATA_CTLADDR_RID:
return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev,
SYS_RES_IOPORT,
PCIR_BAR(1) + (unit << 3), r);
@ -387,7 +387,7 @@ ata_pci_allocate(device_t dev)
{
struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
struct ata_channel *ch = device_get_softc(dev);
struct resource *io = NULL, *altio = NULL;
struct resource *io = NULL, *ctlio = NULL;
int i, rid;
rid = ATA_IOADDR_RID;
@ -395,25 +395,25 @@ ata_pci_allocate(device_t dev)
if (!io)
return ENXIO;
rid = ATA_ALTADDR_RID;
altio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
if (!altio) {
rid = ATA_CTLADDR_RID;
ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
if (!ctlio) {
bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io);
return ENXIO;
}
for (i = ATA_DATA; i <= ATA_STATUS; i ++) {
for (i = ATA_DATA; i <= ATA_COMMAND; i ++) {
ch->r_io[i].res = io;
ch->r_io[i].offset = i;
}
ch->r_io[ATA_ALTSTAT].res = altio;
ch->r_io[ATA_ALTSTAT].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2;
ch->r_io[ATA_CONTROL].res = ctlio;
ch->r_io[ATA_CONTROL].offset = ata_legacy(device_get_parent(dev)) ? 0 : 2;
ch->r_io[ATA_IDX_ADDR].res = io;
ata_default_registers(ch);
if (ctlr->r_res1) {
for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
ch->r_io[i].res = ctlr->r_res1;
ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE);
}
}
@ -546,7 +546,7 @@ ata_pcichannel_detach(device_t dev)
if (ch->dma)
ch->dma->free(ch);
/* free resources for io and altio XXX SOS */
/* free resources for io and ctlio XXX SOS */
return 0;
}