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Migrate ath_debug and sc_debug from an int to a uint64_t / QUAD;

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add some more BAR debugging logic.

* Change the definition of ath_debug and ath_softc.sc_debug  from
  int to uint64_t;
* Change the relevant sysctls;
* Add a new BAR TX debugging field;
* Use this in if_ath_tx.

This has been tested by using the sysctl program, which happily allows
for fields > 32 bits to be configured.
This commit is contained in:
Adrian Chadd 2012-05-15 23:39:37 +00:00
parent ad859ed8cf
commit 0e22ed0eb2
5 changed files with 54 additions and 46 deletions
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6
sys/dev/ath/if_ath_debug.c
View File

@ -89,12 +89,12 @@ __FBSDID("$FreeBSD$");
#ifdef ATH_DEBUG
#include <dev/ath/if_ath_debug.h>
int ath_debug = 0;
uint64_t ath_debug = 0;
SYSCTL_DECL(_hw_ath);
SYSCTL_INT(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
SYSCTL_QUAD(_hw_ath, OID_AUTO, debug, CTLFLAG_RW, &ath_debug,
0, "control debugging printfs");
TUNABLE_INT("hw.ath.debug", &ath_debug);
TUNABLE_QUAD("hw.ath.debug", &ath_debug);
void
ath_printrxbuf(struct ath_softc *sc, const struct ath_buf *bf,

63
sys/dev/ath/if_ath_debug.h
View File

@ -34,39 +34,40 @@
#ifdef ATH_DEBUG
enum {
ATH_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
ATH_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */
ATH_DEBUG_RECV = 0x00000004, /* basic recv operation */
ATH_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */
ATH_DEBUG_RATE = 0x00000010, /* rate control */
ATH_DEBUG_RESET = 0x00000020, /* reset processing */
ATH_DEBUG_MODE = 0x00000040, /* mode init/setup */
ATH_DEBUG_BEACON = 0x00000080, /* beacon handling */
ATH_DEBUG_WATCHDOG = 0x00000100, /* watchdog timeout */
ATH_DEBUG_INTR = 0x00001000, /* ISR */
ATH_DEBUG_TX_PROC = 0x00002000, /* tx ISR proc */
ATH_DEBUG_RX_PROC = 0x00004000, /* rx ISR proc */
ATH_DEBUG_BEACON_PROC = 0x00008000, /* beacon ISR proc */
ATH_DEBUG_CALIBRATE = 0x00010000, /* periodic calibration */
ATH_DEBUG_KEYCACHE = 0x00020000, /* key cache management */
ATH_DEBUG_STATE = 0x00040000, /* 802.11 state transitions */
ATH_DEBUG_NODE = 0x00080000, /* node management */
ATH_DEBUG_LED = 0x00100000, /* led management */
ATH_DEBUG_FF = 0x00200000, /* fast frames */
ATH_DEBUG_DFS = 0x00400000, /* DFS processing */
ATH_DEBUG_TDMA = 0x00800000, /* TDMA processing */
ATH_DEBUG_TDMA_TIMER = 0x01000000, /* TDMA timer processing */
ATH_DEBUG_REGDOMAIN = 0x02000000, /* regulatory processing */
ATH_DEBUG_SW_TX = 0x04000000, /* per-packet software TX */
ATH_DEBUG_SW_TX_BAW = 0x08000000, /* BAW handling */
ATH_DEBUG_SW_TX_CTRL = 0x10000000, /* queue control */
ATH_DEBUG_SW_TX_AGGR = 0x20000000, /* aggregate TX */
ATH_DEBUG_SW_TX_RETRIES = 0x40000000, /* software TX retries */
ATH_DEBUG_FATAL = 0x80000000, /* fatal errors */
ATH_DEBUG_ANY = 0xffffffff
ATH_DEBUG_XMIT = 0x000000001ULL, /* basic xmit operation */
ATH_DEBUG_XMIT_DESC = 0x000000002ULL, /* xmit descriptors */
ATH_DEBUG_RECV = 0x000000004ULL, /* basic recv operation */
ATH_DEBUG_RECV_DESC = 0x000000008ULL, /* recv descriptors */
ATH_DEBUG_RATE = 0x000000010ULL, /* rate control */
ATH_DEBUG_RESET = 0x000000020ULL, /* reset processing */
ATH_DEBUG_MODE = 0x000000040ULL, /* mode init/setup */
ATH_DEBUG_BEACON = 0x000000080ULL, /* beacon handling */
ATH_DEBUG_WATCHDOG = 0x000000100ULL, /* watchdog timeout */
ATH_DEBUG_INTR = 0x000001000ULL, /* ISR */
ATH_DEBUG_TX_PROC = 0x000002000ULL, /* tx ISR proc */
ATH_DEBUG_RX_PROC = 0x000004000ULL, /* rx ISR proc */
ATH_DEBUG_BEACON_PROC = 0x000008000ULL, /* beacon ISR proc */
ATH_DEBUG_CALIBRATE = 0x000010000ULL, /* periodic calibration */
ATH_DEBUG_KEYCACHE = 0x000020000ULL, /* key cache management */
ATH_DEBUG_STATE = 0x000040000ULL, /* 802.11 state transitions */
ATH_DEBUG_NODE = 0x000080000ULL, /* node management */
ATH_DEBUG_LED = 0x000100000ULL, /* led management */
ATH_DEBUG_FF = 0x000200000ULL, /* fast frames */
ATH_DEBUG_DFS = 0x000400000ULL, /* DFS processing */
ATH_DEBUG_TDMA = 0x000800000ULL, /* TDMA processing */
ATH_DEBUG_TDMA_TIMER = 0x001000000ULL, /* TDMA timer processing */
ATH_DEBUG_REGDOMAIN = 0x002000000ULL, /* regulatory processing */
ATH_DEBUG_SW_TX = 0x004000000ULL, /* per-packet software TX */
ATH_DEBUG_SW_TX_BAW = 0x008000000ULL, /* BAW handling */
ATH_DEBUG_SW_TX_CTRL = 0x010000000ULL, /* queue control */
ATH_DEBUG_SW_TX_AGGR = 0x020000000ULL, /* aggregate TX */
ATH_DEBUG_SW_TX_RETRIES = 0x040000000ULL, /* software TX retries */
ATH_DEBUG_FATAL = 0x080000000ULL, /* fatal errors */
ATH_DEBUG_SW_TX_BAR = 0x100000000ULL, /* BAR TX */
ATH_DEBUG_ANY = 0xffffffffffffffffULL
};
extern int ath_debug;
extern uint64_t ath_debug;
#define IFF_DUMPPKTS(sc, m) \
((sc->sc_debug & (m)) || \

4
sys/dev/ath/if_ath_sysctl.c
View File

@ -501,8 +501,8 @@ ath_sysctlattach(struct ath_softc *sc)
"regdomain", CTLFLAG_RD, &sc->sc_eerd, 0,
"EEPROM regdomain code");
#ifdef ATH_DEBUG
SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
"debug", CTLFLAG_RW, &sc->sc_debug, 0,
SYSCTL_ADD_QUAD(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
"debug", CTLFLAG_RW, &sc->sc_debug,
"control debugging printfs");
#endif
SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,

25
sys/dev/ath/if_ath_tx.c
View File

@ -2673,7 +2673,7 @@ ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
{
ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
"%s: tid=%p, called\n",
__func__,
tid);
@ -2704,7 +2704,7 @@ ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
{
ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
"%s: tid=%p, called\n",
__func__,
tid);
@ -2732,6 +2732,9 @@ ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
if (tid->bar_wait == 0 || tid->hwq_depth > 0)
return (0);
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, "%s: tid=%p (%d), bar ready\n",
__func__, tid, tid->tid);
return (1);
}
@ -2754,7 +2757,7 @@ ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
ATH_TXQ_LOCK_ASSERT(sc->sc_ac2q[tid->ac]);
DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
"%s: tid=%p, called\n",
__func__,
tid);
@ -2776,7 +2779,7 @@ ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
/* Don't do anything if we still have pending frames */
if (tid->hwq_depth > 0) {
DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
"%s: tid=%p, hwq_depth=%d, waiting\n",
__func__,
tid,
@ -2793,7 +2796,7 @@ ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
*
* XXX verify this is _actually_ the valid value to begin at!
*/
DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
"%s: tid=%p, new BAW left edge=%d\n",
__func__,
tid,
@ -2865,10 +2868,11 @@ ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
SEQNO(bf->bf_state.bfs_seqno),
bf->bf_state.bfs_retries);
device_printf(sc->sc_dev,
"%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d\n",
"%s: node %p: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d\n",
__func__, ni, bf,
tid->axq_depth,
tid->hwq_depth);
tid->hwq_depth,
tid->bar_wait);
device_printf(sc->sc_dev,
"%s: node %p: bf=%p: tid %d: txq_depth=%d, "
"txq_aggr_depth=%d, sched=%d, paused=%d, "
@ -4440,8 +4444,11 @@ ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
struct ath_tid *atid = &an->an_tid[tid];
int attempts = tap->txa_attempts;
DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
"%s: called; status=%d\n", __func__, status);
DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
"%s: called; status=%d, attempts=%d\n",
__func__,
status,
attempts);
/* Note: This may update the BAW details */
sc->sc_bar_response(ni, tap, status);

2
sys/dev/ath/if_athvar.h
View File

@ -351,7 +351,7 @@ struct ath_softc {
struct ath_stats sc_stats; /* interface statistics */
struct ath_tx_aggr_stats sc_aggr_stats;
struct ath_intr_stats sc_intr_stats;
int sc_debug;
uint64_t sc_debug;
int sc_nvaps; /* # vaps */
int sc_nstavaps; /* # station vaps */
int sc_nmeshvaps; /* # mbss vaps */