Style(9) and white space fixes.
This commit is contained in:
adrian
parent
23c6d6eeb0
commit
0e5c802c61
@ -67,11 +67,11 @@ __FBSDID("$FreeBSD$");
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#include <sys/firmware.h>
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#endif /* AR71XX_ATH_EEPROM */
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#undef AR71XX_PCI_DEBUG
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#ifdef AR71XX_PCI_DEBUG
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#define dprintf printf
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#undef AR71XX_PCI_DEBUG
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#ifdef AR71XX_PCI_DEBUG
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#define dprintf printf
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#else
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#define dprintf(x, arg...)
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#define dprintf(x, arg...)
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#endif
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struct mtx ar71xx_pci_mtx;
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@ -97,7 +97,7 @@ static int ar71xx_pci_teardown_intr(device_t, device_t, struct resource *,
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void *);
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static int ar71xx_pci_intr(void *);
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static void
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static void
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ar71xx_pci_mask_irq(void *source)
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{
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uint32_t reg;
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@ -110,7 +110,7 @@ ar71xx_pci_mask_irq(void *source)
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ATH_WRITE_REG(AR71XX_PCI_INTR_MASK, reg & ~(1 << irq));
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}
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static void
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static void
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ar71xx_pci_unmask_irq(void *source)
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{
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uint32_t reg;
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@ -123,15 +123,16 @@ ar71xx_pci_unmask_irq(void *source)
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reg = ATH_READ_REG(AR71XX_PCI_INTR_MASK);
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}
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/*
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* get bitmask for bytes of interest:
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* 0 - we want this byte, 1 - ignore it. e.g: we read 1 byte
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/*
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* get bitmask for bytes of interest:
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* 0 - we want this byte, 1 - ignore it. e.g: we read 1 byte
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* from register 7. Bitmask would be: 0111
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*/
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static uint32_t
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ar71xx_get_bytes_to_read(int reg, int bytes)
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{
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uint32_t bytes_to_read = 0;
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if ((bytes % 4) == 0)
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bytes_to_read = 0;
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else if ((bytes % 4) == 1)
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@ -144,7 +145,7 @@ ar71xx_get_bytes_to_read(int reg, int bytes)
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return (bytes_to_read);
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}
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static int
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static int
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ar71xx_pci_check_bus_error(void)
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{
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uint32_t error, addr, has_errors = 0;
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@ -185,20 +186,20 @@ ar71xx_pci_make_addr(int bus, int slot, int func, int reg)
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if (bus == 0) {
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return ((1 << slot) | (func << 8) | (reg & ~3));
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} else {
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return ((bus << 16) | (slot << 11) | (func << 8)
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return ((bus << 16) | (slot << 11) | (func << 8)
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| (reg & ~3) | 1);
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}
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}
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static int
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ar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes,
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ar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes,
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uint32_t cmd)
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{
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uint32_t addr = ar71xx_pci_make_addr(bus, slot, func, (reg & ~3));
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cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 4);
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mtx_assert(&ar71xx_pci_mtx, MA_OWNED);
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cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 4);
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ATH_WRITE_REG(AR71XX_PCI_CONF_ADDR, addr);
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ATH_WRITE_REG(AR71XX_PCI_CONF_CMD, cmd);
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@ -209,7 +210,7 @@ ar71xx_pci_conf_setup(int bus, int slot, int func, int reg, int bytes,
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}
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static uint32_t
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ar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
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ar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
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u_int reg, int bytes)
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{
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uint32_t data;
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@ -240,7 +241,7 @@ ar71xx_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
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/* get request bytes from 32-bit word */
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data = (data >> shift) & mask;
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dprintf("%s: read 0x%x\n", __func__, data);
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dprintf("%s: read 0x%x\n", __func__, data);
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return (data);
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}
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@ -253,7 +254,6 @@ ar71xx_pci_local_write(device_t dev, uint32_t reg, uint32_t data, int bytes)
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dprintf("%s: local write reg %d(%d)\n", __func__, reg, bytes);
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data = data << (8*(reg % 4));
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cmd = PCI_LCONF_CMD_WRITE | (reg & ~3);
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cmd |= (ar71xx_get_bytes_to_read(reg, bytes) << 20);
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mtx_lock_spin(&ar71xx_pci_mtx);
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@ -271,7 +271,6 @@ ar71xx_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
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func, reg, bytes);
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data = data << (8*(reg % 4));
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mtx_lock_spin(&ar71xx_pci_mtx);
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if (ar71xx_pci_conf_setup(bus, slot, func, reg, bytes,
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PCI_CONF_CMD_WRITE) == 0)
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@ -453,7 +452,7 @@ ar71xx_pci_attach(device_t dev)
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if ((bus_setup_intr(dev, sc->sc_irq, INTR_TYPE_MISC,
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ar71xx_pci_intr, NULL, sc, &sc->sc_ih))) {
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device_printf(dev,
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device_printf(dev,
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"WARNING: unable to register interrupt handler\n");
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return ENXIO;
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}
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@ -501,7 +500,8 @@ ar71xx_pci_attach(device_t dev)
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}
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static int
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ar71xx_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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ar71xx_pci_read_ivar(device_t dev, device_t child, int which,
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uintptr_t *result)
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{
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struct ar71xx_pci_softc *sc = device_get_softc(dev);
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@ -518,7 +518,8 @@ ar71xx_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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}
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static int
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ar71xx_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t result)
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ar71xx_pci_write_ivar(device_t dev, device_t child, int which,
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uintptr_t result)
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{
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struct ar71xx_pci_softc * sc = device_get_softc(dev);
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@ -536,7 +537,7 @@ ar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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u_long start, u_long end, u_long count, u_int flags)
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{
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struct ar71xx_pci_softc *sc = device_get_softc(bus);
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struct ar71xx_pci_softc *sc = device_get_softc(bus);
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struct resource *rv;
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struct rman *rm;
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@ -563,13 +564,10 @@ ar71xx_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
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rman_release_resource(rv);
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return (NULL);
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}
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}
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}
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return (rv);
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}
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static int
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ar71xx_pci_activate_resource(device_t bus, device_t child, int type, int rid,
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struct resource *r)
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@ -585,16 +583,13 @@ ar71xx_pci_activate_resource(device_t bus, device_t child, int type, int rid,
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break;
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}
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}
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return (res);
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}
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static int
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ar71xx_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
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int flags, driver_filter_t *filt, driver_intr_t *handler,
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void *arg, void **cookiep)
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int flags, driver_filter_t *filt, driver_intr_t *handler,
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void *arg, void **cookiep)
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{
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struct ar71xx_pci_softc *sc = device_get_softc(bus);
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struct intr_event *event;
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@ -617,7 +612,7 @@ ar71xx_pci_setup_intr(device_t bus, device_t child, struct resource *ires,
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mips_intrcnt_create(event->ie_name);
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}
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else
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return error;
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return (error);
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}
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intr_event_add_handler(event, device_get_nameunit(child), filt,
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