From 0e78005e5ca1323a9c4eefca6f77157101d9e53b Mon Sep 17 00:00:00 2001 From: Jung-uk Kim Date: Thu, 14 Apr 2011 17:50:26 +0000 Subject: [PATCH] Work around an emulator problem where virtual CPU advertises TSC is P-state invariant and APERF/MPERF MSRs exist but these MSRs never tick. When we calculate effective frequency from cpu_est_clockrate(), it caused panic of division-by-zero. Now we test whether these MSRs actually increase to avoid such foot-shooting. Reported by: dim Tested by: dim --- sys/x86/x86/tsc.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/sys/x86/x86/tsc.c b/sys/x86/x86/tsc.c index 04e936a535a2..c08f4adc8e62 100644 --- a/sys/x86/x86/tsc.c +++ b/sys/x86/x86/tsc.c @@ -183,8 +183,18 @@ probe_tsc_freq(void) if (cpu_high >= 6) { do_cpuid(6, regs); - if ((regs[2] & CPUID_PERF_STAT) != 0) - tsc_perf_stat = 1; + if ((regs[2] & CPUID_PERF_STAT) != 0) { + /* + * XXX Some emulators expose host CPUID without actual + * support for these MSRs. We must test whether they + * really work. + */ + wrmsr(MSR_MPERF, 0); + wrmsr(MSR_APERF, 0); + DELAY(10); + if (rdmsr(MSR_MPERF) > 0 && rdmsr(MSR_APERF) > 0) + tsc_perf_stat = 1; + } } if (tsc_skip_calibration) {