Improve fix in r304629 by allowing configuration of the behaviour

through a SYSCTL instead of a compile time define.

Add quirk by default for all LynxPoint XHCI controllers.

PR:		227602
MFC after:	3 days
Sponsored by:	Mellanox Technologies
This commit is contained in:
hselasky 2018-04-30 07:30:37 +00:00
parent 3bb0c61477
commit 0ec6a6be67
3 changed files with 18 additions and 5 deletions

View File

@ -100,6 +100,7 @@ static int xhcidebug;
static int xhciroute;
static int xhcipolling;
static int xhcidma32;
static int xhcictlstep;
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, debug, CTLFLAG_RWTUN,
&xhcidebug, 0, "Debug level");
@ -109,9 +110,12 @@ SYSCTL_INT(_hw_usb_xhci, OID_AUTO, use_polling, CTLFLAG_RWTUN,
&xhcipolling, 0, "Set to enable software interrupt polling for the XHCI controller");
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, dma32, CTLFLAG_RWTUN,
&xhcidma32, 0, "Set to only use 32-bit DMA for the XHCI controller");
SYSCTL_INT(_hw_usb_xhci, OID_AUTO, ctlstep, CTLFLAG_RWTUN,
&xhcictlstep, 0, "Set to enable control endpoint status stage stepping");
#else
#define xhciroute 0
#define xhcidma32 0
#define xhcictlstep 0
#endif
#define XHCI_INTR_ENDPT 1
@ -2240,11 +2244,17 @@ xhci_setup_generic_chain(struct usb_xfer *xfer)
* Send a DATA1 message and invert the current
* endpoint direction.
*/
#ifdef XHCI_STEP_STATUS_STAGE
temp.step_td = (xfer->nframes != 0);
#else
temp.step_td = 0;
#endif
if (xhcictlstep || temp.sc->sc_ctlstep) {
/*
* Some XHCI controllers will not delay the
* status stage until the next SOF. Force this
* behaviour to avoid failed control
* transfers.
*/
temp.step_td = (xfer->nframes != 0);
} else {
temp.step_td = 0;
}
temp.direction = UE_GET_DIR(xfer->endpointno) ^ UE_DIR_IN;
temp.len = 0;
temp.pc = NULL;

View File

@ -509,6 +509,8 @@ struct xhci_softc {
uint8_t sc_noport;
/* root HUB device configuration */
uint8_t sc_conf;
/* step status stage of all control transfers */
uint8_t sc_ctlstep;
/* root HUB port event bitmap, max 256 ports */
uint8_t sc_hub_idata[32];

View File

@ -256,6 +256,7 @@ xhci_pci_attach(device_t self)
*/
sc->sc_port_route = &xhci_pci_port_route;
sc->sc_imod_default = XHCI_IMOD_DEFAULT_LP;
sc->sc_ctlstep = 1;
break;
}