MFC r276321, r276404, r276407 and r276799:

Various XHCI fixes and improvements:
- Improve and fix MSI interrupt allocation, setup and release.
- Add missed flushing of data which can happen when "xhci_configure_mask()"
  is called from "xhci_configure_reset_endpoint()". Ensure the 3-strikes
  error feature is always enabled except for ISOCHRONOUS transfers.
- Allow systems having a page size greater than 4K to use fewer
  scatter-gather XHCI TRB entries for its payload data. The XHCI
  controller can handle at least 65536 bytes per scatter-gather list
  entry.
This commit is contained in:
hselasky 2015-01-11 11:28:03 +00:00
parent 0669b1a982
commit 0ee44a5ce1
3 changed files with 48 additions and 29 deletions

View File

@ -2287,6 +2287,7 @@ xhci_configure_mask(struct usb_device *udev, uint32_t mask, uint8_t drop)
temp |= XHCI_SCTX_0_CTX_NUM_SET(x + 1);
xhci_ctx_set_le32(sc, &pinp->ctx_slot.dwSctx0, temp);
}
usb_pc_cpu_flush(&sc->sc_hw.devs[index].input_pc);
return (0);
}
@ -2391,10 +2392,14 @@ xhci_configure_endpoint(struct usb_device *udev,
XHCI_EPCTX_1_MAXB_SET(max_packet_count) |
XHCI_EPCTX_1_MAXP_SIZE_SET(max_packet_size);
if ((udev->parent_hs_hub != NULL) || (udev->address != 0)) {
if (type != UE_ISOCHRONOUS)
temp |= XHCI_EPCTX_1_CERR_SET(3);
}
/*
* Always enable the "three strikes and you are gone" feature
* except for ISOCHRONOUS endpoints. This is suggested by
* section 4.3.3 in the XHCI specification about device slot
* initialisation.
*/
if (type != UE_ISOCHRONOUS)
temp |= XHCI_EPCTX_1_CERR_SET(3);
switch (type) {
case UE_CONTROL:

View File

@ -320,11 +320,23 @@ struct xhci_dev_endpoint_trbs {
XHCI_MAX_TRANSFERS) + XHCI_MAX_STREAMS];
};
#define XHCI_TD_PAGE_NBUF 17 /* units, room enough for 64Kbytes */
#define XHCI_TD_PAGE_SIZE 4096 /* bytes */
#define XHCI_TD_PAYLOAD_MAX (XHCI_TD_PAGE_SIZE * (XHCI_TD_PAGE_NBUF - 1))
#if (USB_PAGE_SIZE < 4096)
#error "The XHCI driver needs a pagesize above or equal to 4K"
#endif
/* Define the maximum payload which we will handle in a single TRB */
#define XHCI_TD_PAYLOAD_MAX 65536 /* bytes */
/* Define the maximum payload of a single scatter-gather list element */
#define XHCI_TD_PAGE_SIZE \
((USB_PAGE_SIZE < XHCI_TD_PAYLOAD_MAX) ? USB_PAGE_SIZE : XHCI_TD_PAYLOAD_MAX)
/* Define the maximum length of the scatter-gather list */
#define XHCI_TD_PAGE_NBUF \
(((XHCI_TD_PAYLOAD_MAX + XHCI_TD_PAGE_SIZE - 1) / XHCI_TD_PAGE_SIZE) + 1)
struct xhci_td {
/* one LINK TRB has been added to the TRB array */
struct xhci_trb td_trb[XHCI_TD_PAGE_NBUF + 1];
/*
@ -452,7 +464,6 @@ struct xhci_softc {
struct usb_device *sc_devices[XHCI_MAX_DEVICES];
struct resource *sc_io_res;
int sc_irq_rid;
struct resource *sc_irq_res;
void *sc_intr_hdl;

View File

@ -201,21 +201,19 @@ xhci_pci_attach(device_t self)
usb_callout_init_mtx(&sc->sc_callout, &sc->sc_bus.bus_mtx, 0);
sc->sc_irq_rid = 0;
rid = 0;
if (xhci_use_msi) {
count = pci_msi_count(self);
if (count >= 1) {
count = 1;
if (pci_alloc_msi(self, &count) == 0) {
if (bootverbose)
device_printf(self, "MSI enabled\n");
sc->sc_irq_rid = 1;
}
count = 1;
if (pci_alloc_msi(self, &count) == 0) {
if (bootverbose)
device_printf(self, "MSI enabled\n");
rid = 1;
}
}
sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ,
&sc->sc_irq_rid, RF_SHAREABLE | RF_ACTIVE);
sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
RF_ACTIVE | (rid != 0 ? 0 : RF_SHAREABLE));
if (sc->sc_irq_res == NULL) {
pci_release_msi(self);
device_printf(self, "Could not allocate IRQ\n");
/* goto error; FALLTHROUGH - use polling */
}
@ -232,16 +230,22 @@ xhci_pci_attach(device_t self)
err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
NULL, (driver_intr_t *)xhci_interrupt, sc, &sc->sc_intr_hdl);
if (err != 0) {
bus_release_resource(self, SYS_RES_IRQ,
rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
sc->sc_irq_res = NULL;
pci_release_msi(self);
device_printf(self, "Could not setup IRQ, err=%d\n", err);
sc->sc_intr_hdl = NULL;
}
}
if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL ||
xhci_use_polling() != 0) {
device_printf(self, "Interrupt polling at %dHz\n", hz);
USB_BUS_LOCK(&sc->sc_bus);
xhci_interrupt_poll(sc);
USB_BUS_UNLOCK(&sc->sc_bus);
if (sc->sc_irq_res == NULL || sc->sc_intr_hdl == NULL) {
if (xhci_use_polling() != 0) {
device_printf(self, "Interrupt polling at %dHz\n", hz);
USB_BUS_LOCK(&sc->sc_bus);
xhci_interrupt_poll(sc);
USB_BUS_UNLOCK(&sc->sc_bus);
} else
goto error;
}
/* On Intel chipsets reroute ports from EHCI to XHCI controller. */
@ -304,11 +308,10 @@ xhci_pci_detach(device_t self)
sc->sc_intr_hdl = NULL;
}
if (sc->sc_irq_res) {
if (sc->sc_irq_rid == 1)
pci_release_msi(self);
bus_release_resource(self, SYS_RES_IRQ, sc->sc_irq_rid,
sc->sc_irq_res);
bus_release_resource(self, SYS_RES_IRQ,
rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
sc->sc_irq_res = NULL;
pci_release_msi(self);
}
if (sc->sc_io_res) {
bus_release_resource(self, SYS_RES_MEMORY, PCI_XHCI_CBMEM,