Use newly introduced cpu_vendor_id to make invariant TSC detection more
clearer and merge r185295 to amd64.
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5113aa0af3
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0eec8b9141
@ -360,14 +360,20 @@ printcpuinfo(void)
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* If this CPU supports P-state invariant TSC then
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* mention the capability.
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*/
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if (!tsc_is_invariant &&
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(cpu_vendor_id == CPU_VENDOR_AMD &&
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((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 ||
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AMD64_CPU_FAMILY(cpu_id) >= 0x10 ||
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cpu_id == 0x60fb2))) {
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tsc_is_invariant = 1;
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printf("\n TSC: P-state invariant");
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switch (cpu_vendor_id) {
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case CPU_VENDOR_AMD:
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if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
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AMD64_CPU_FAMILY(cpu_id) >= 0x10 ||
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cpu_id == 0x60fb2)
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tsc_is_invariant = 1;
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break;
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case CPU_VENDOR_INTEL:
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if (amd_pminfo & AMDPM_TSC_INVARIANT)
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tsc_is_invariant = 1;
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break;
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}
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if (tsc_is_invariant)
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printf("\n TSC: P-state invariant");
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/*
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* If this CPU supports HTT or CMP then mention the
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@ -864,15 +864,20 @@ printcpuinfo(void)
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* If this CPU supports P-state invariant TSC then
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* mention the capability.
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*/
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if (!tsc_is_invariant &&
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((cpu_vendor_id == CPU_VENDOR_AMD ||
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cpu_vendor_id == CPU_VENDOR_INTEL) &&
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((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 ||
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I386_CPU_FAMILY(cpu_id) >= 0x10 ||
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cpu_id == 0x60fb2))) {
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tsc_is_invariant = 1;
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printf("\n TSC: P-state invariant");
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switch (cpu_vendor_id) {
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case CPU_VENDOR_AMD:
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if ((amd_pminfo & AMDPM_TSC_INVARIANT) ||
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I386_CPU_FAMILY(cpu_id) >= 0x10 ||
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cpu_id == 0x60fb2)
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tsc_is_invariant = 1;
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break;
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case CPU_VENDOR_INTEL:
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if (amd_pminfo & AMDPM_TSC_INVARIANT)
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tsc_is_invariant = 1;
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break;
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}
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if (tsc_is_invariant)
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printf("\n TSC: P-state invariant");
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/*
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* If this CPU supports HTT or CMP then mention the
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