Restore PBA setup for igb(4) class devices.
Do no write to PBA register on igb(4) devices unless we need to make adjustments for the 82575 and jumbo frames. Remove redundant LPE/~LPE assignments. Move e1000_lv_jumbo_workaround_ich8lan() invokcation into a block so that its not executed in the igb case. Move em(4) class assignments of RCTL values to its own code block. Adjust a few direct accesses of ifp->mtu to use accessor functions. PR: 216734 Submitted by: Kaho Toshikazu <kaho@elam.kais.kyoto-u.ac.jp>
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@ -2238,14 +2238,63 @@ em_reset(if_ctx_t ctx)
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case e1000_pch_spt:
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pba = E1000_PBA_26K;
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break;
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case e1000_82575:
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pba = E1000_PBA_32K;
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break;
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case e1000_82576:
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case e1000_vfadapt:
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pba = E1000_READ_REG(hw, E1000_RXPBS);
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pba &= E1000_RXPBS_SIZE_MASK_82576;
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break;
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case e1000_82580:
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case e1000_i350:
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case e1000_i354:
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case e1000_vfadapt_i350:
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pba = E1000_READ_REG(hw, E1000_RXPBS);
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pba = e1000_rxpbs_adjust_82580(pba);
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break;
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case e1000_i210:
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case e1000_i211:
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pba = E1000_PBA_34K;
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break;
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default:
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if (adapter->hw.mac.max_frame_size > 8192)
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pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
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else
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pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
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}
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/* Special needs in case of Jumbo frames */
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if ((hw->mac.type == e1000_82575) && (ifp->if_mtu > ETHERMTU)) {
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u32 tx_space, min_tx, min_rx;
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pba = E1000_READ_REG(hw, E1000_PBA);
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tx_space = pba >> 16;
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pba &= 0xffff;
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min_tx = (adapter->hw.mac.max_frame_size +
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sizeof(struct e1000_tx_desc) - ETHERNET_FCS_SIZE) * 2;
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min_tx = roundup2(min_tx, 1024);
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min_tx >>= 10;
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min_rx = adapter->hw.mac.max_frame_size;
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min_rx = roundup2(min_rx, 1024);
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min_rx >>= 10;
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if (tx_space < min_tx &&
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((min_tx - tx_space) < pba)) {
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pba = pba - (min_tx - tx_space);
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/*
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* if short on rx space, rx wins
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* and must trump tx adjustment
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*/
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if (pba < min_rx)
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pba = min_rx;
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}
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E1000_WRITE_REG(hw, E1000_PBA, pba);
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}
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if (hw->mac.type < igb_mac_min)
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E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
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INIT_DEBUGOUT1("em_reset: pba=%dK",pba);
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/*
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* These parameters control the automatic generation (Tx) and
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* response (Rx) to Ethernet PAUSE frames.
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@ -2260,7 +2309,7 @@ em_reset(if_ctx_t ctx)
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* by 1500.
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* - The pause time is fairly large at 1000 x 512ns = 512 usec.
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*/
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rx_buffer_size = ((E1000_READ_REG(hw, E1000_PBA) & 0xffff) << 10 );
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rx_buffer_size = (pba & 0xffff) << 10;
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hw->fc.high_water = rx_buffer_size -
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roundup2(adapter->hw.mac.max_frame_size, 1024);
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hw->fc.low_water = hw->fc.high_water - 1500;
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@ -2305,6 +2354,21 @@ em_reset(if_ctx_t ctx)
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else
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E1000_WRITE_REG(hw, E1000_PBA, 26);
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break;
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case e1000_82575:
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case e1000_82576:
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/* 8-byte granularity */
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hw->fc.low_water = hw->fc.high_water - 8;
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break;
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case e1000_82580:
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case e1000_i350:
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case e1000_i354:
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case e1000_i210:
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case e1000_i211:
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case e1000_vfadapt:
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case e1000_vfadapt_i350:
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/* 16-byte granularity */
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hw->fc.low_water = hw->fc.high_water - 16;
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break;
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case e1000_ich9lan:
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case e1000_ich10lan:
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if (if_getmtu(ifp) > ETHERMTU) {
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@ -2975,9 +3039,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
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} else if (adapter->hw.mac.type >= igb_mac_min) {
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u32 psize, srrctl = 0;
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if (ifp->if_mtu > ETHERMTU) {
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rctl |= E1000_RCTL_LPE;
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if (if_getmtu(ifp) > ETHERMTU) {
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/* Set maximum packet len */
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psize = scctx->isc_max_frame_size;
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if (psize <= 4096) {
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@ -2993,7 +3055,6 @@ em_initialize_receive_unit(if_ctx_t ctx)
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psize += VLAN_TAG_SIZE;
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E1000_WRITE_REG(&adapter->hw, E1000_RLPML, psize);
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} else {
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rctl &= ~E1000_RCTL_LPE;
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srrctl |= 2048 >> E1000_SRRCTL_BSIZEPKT_SHIFT;
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rctl |= E1000_RCTL_SZ_2048;
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}
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@ -3039,8 +3100,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
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rxdctl |= IGB_RX_WTHRESH << 16;
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E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
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}
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}
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if (adapter->hw.mac.type >= e1000_pch2lan) {
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} else if (adapter->hw.mac.type >= e1000_pch2lan) {
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if (if_getmtu(ifp) > ETHERMTU)
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e1000_lv_jumbo_workaround_ich8lan(hw, TRUE);
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else
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@ -3050,6 +3110,7 @@ em_initialize_receive_unit(if_ctx_t ctx)
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/* Make sure VLAN Filters are off */
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rctl &= ~E1000_RCTL_VFE;
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if (adapter->hw.mac.type < igb_mac_min) {
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if (adapter->rx_mbuf_sz == MCLBYTES)
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rctl |= E1000_RCTL_SZ_2048;
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else if (adapter->rx_mbuf_sz == MJUMPAGESIZE)
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@ -3059,6 +3120,8 @@ em_initialize_receive_unit(if_ctx_t ctx)
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/* ensure we clear use DTYPE of 00 here */
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rctl &= ~0x00000C00;
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}
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/* Write out the settings */
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E1000_WRITE_REG(hw, E1000_RCTL, rctl);
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