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sfxge: style fixes

Browse Source 
Sponsored by:   Solarflare Communications, Inc.
Approved by:    gnn (mentor)
This commit is contained in:
Andrew Rybchenko 2015-02-16 06:12:04 +00:00
parent d67580d164
commit 0ff2378988
9 changed files with 28 additions and 23 deletions
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6
sys/dev/sfxge/common/efx_ev.c
View File

@ -89,7 +89,8 @@ efx_ev_rx_not_ok(
if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
EFSYS_PROBE(tobe_disc);
/* Assume this is a unicast address mismatch, unless below
/*
* Assume this is a unicast address mismatch, unless below
* we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
* EV_RX_PAUSE_FRM_ERR is set.
*/
@ -102,7 +103,8 @@ efx_ev_rx_not_ok(
(*flagsp) |= EFX_DISCARD;
#if (EFSYS_OPT_RX_HDR_SPLIT || EFSYS_OPT_RX_SCATTER)
/* Lookout for payload queue ran dry errors and ignore them.
/*
* Lookout for payload queue ran dry errors and ignore them.
*
* Sadly for the header/data split cases, the descriptor
* pointer in this event refers to the header queue and

4
sys/dev/sfxge/common/efx_mac.c
View File

@ -669,11 +669,11 @@ efx_mac_select(
EFSYS_ASSERT(emop != NULL);
epp->ep_mac_type = type;
if (emop->emo_reset != NULL) {
if ((rc = emop->emo_reset(enp)) != 0)
goto fail1;
EFSYS_ASSERT(enp->en_reset_flags & EFX_RESET_MAC);
enp->en_reset_flags &= ~EFX_RESET_MAC;
}

6
sys/dev/sfxge/common/efx_mcdi.c
View File

@ -44,7 +44,8 @@ __FBSDID("$FreeBSD$");
#define MCDI_P1_REBOOT_OFST 0x1fe
#define MCDI_P2_REBOOT_OFST 0x1ff
/* A reboot/assertion causes the MCDI status word to be set after the
/*
* A reboot/assertion causes the MCDI status word to be set after the
* command word is set or a REBOOT event is sent. If we notice a reboot
* via these mechanisms then wait 10ms for the status word to be set.
*/
@ -459,7 +460,8 @@ efx_mcdi_ev_death(
++emip->emi_aborted;
}
/* Since we're running in parallel with a request, consume the
/*
* Since we're running in parallel with a request, consume the
* status word before dropping the lock.
*/
if (rc == EIO || rc == EINTR) {

3
sys/dev/sfxge/common/efx_nic.c
View File

@ -253,7 +253,8 @@ efx_nic_create(
EFX_FEATURE_LFSR_HASH_INSERT |
EFX_FEATURE_LINK_EVENTS | EFX_FEATURE_PERIODIC_MAC_STATS |
EFX_FEATURE_WOL | EFX_FEATURE_MCDI |
EFX_FEATURE_LOOKAHEAD_SPLIT | EFX_FEATURE_MAC_HEADER_FILTERS;
EFX_FEATURE_LOOKAHEAD_SPLIT |
EFX_FEATURE_MAC_HEADER_FILTERS;
break;
#endif /* EFSYS_OPT_SIENA */

7
sys/dev/sfxge/common/efx_rx.c
View File

@ -527,7 +527,7 @@ efx_rx_filter_insert(
EFSYS_ASSERT3P(spec, !=, NULL);
spec->efs_dmaq_id = (uint16_t)erp->er_index;
return efx_filter_insert_filter(erp->er_enp, spec, B_FALSE);
return (efx_filter_insert_filter(erp->er_enp, spec, B_FALSE));
}
#endif
@ -541,7 +541,7 @@ efx_rx_filter_remove(
EFSYS_ASSERT3P(spec, !=, NULL);
spec->efs_dmaq_id = (uint16_t)erp->er_index;
return efx_filter_remove_filter(erp->er_enp, spec);
return (efx_filter_remove_filter(erp->er_enp, spec));
}
#endif
@ -673,7 +673,8 @@ efx_rx_qcreate(
EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_RX);
EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << FRF_AZ_RX_DESCQ_LABEL_WIDTH));
EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS ==
(1 << FRF_AZ_RX_DESCQ_LABEL_WIDTH));
EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);

4
sys/dev/sfxge/common/efx_tx.c
View File

@ -114,7 +114,7 @@ efx_tx_filter_insert(
EFSYS_ASSERT3P(spec, !=, NULL);
spec->efs_dmaq_id = (uint16_t)etp->et_index;
return efx_filter_insert_filter(etp->et_enp, spec, B_FALSE);
return (efx_filter_insert_filter(etp->et_enp, spec, B_FALSE));
}
#endif
@ -128,7 +128,7 @@ efx_tx_filter_remove(
EFSYS_ASSERT3P(spec, !=, NULL);
spec->efs_dmaq_id = (uint16_t)etp->et_index;
return efx_filter_remove_filter(etp->et_enp, spec);
return (efx_filter_remove_filter(etp->et_enp, spec));
}
#endif

12
sys/dev/sfxge/common/siena_mon.c
View File

@ -138,13 +138,13 @@ siena_mon_decode_stats(
efx_dword_t dword;
EFSYS_MEM_READD(esmp, 4 * mc_sensor, &dword);
emsvp->emsv_value =
(uint16_t)EFX_DWORD_FIELD(
dword,
MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE);
(uint16_t)EFX_DWORD_FIELD(
dword,
MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE);
emsvp->emsv_state =
(uint16_t)EFX_DWORD_FIELD(
dword,
MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE);
(uint16_t)EFX_DWORD_FIELD(
dword,
MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE);
}
}

3
sys/dev/sfxge/common/siena_nic.c
View File

@ -324,7 +324,8 @@ siena_board_cfg(
efx_mcdi_execute(enp, &req);
if (req.emr_rc == 0) {
if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
if (req.emr_out_length_used <
MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
rc = EMSGSIZE;
goto fail3;
}

6
sys/dev/sfxge/common/siena_vpd.c
View File

@ -541,11 +541,9 @@ siena_vpd_write(
/* Copy in new vpd and update header */
vpd_offset = dcfg_size - vpd_length;
EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
EFX_DWORD_0, vpd_offset);
EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset, EFX_DWORD_0, vpd_offset);
memcpy((caddr_t)dcfg + vpd_offset, data, vpd_length);
EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length,
EFX_DWORD_0, vpd_length);
EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, vpd_length);
/* Update the checksum */
cksum = 0;