Spruce up the ADMtek driver: conver to newbus, miibus and add support
for the AN985 "Centaur" chip, which is apparently the next genetation of the "Comet." The AN985 is also a tulip clone and is similar to the AL981 except that it uses a 99C66 EEPROM and a serial MII interface (instead of direct access to the PHY registers). Also updated various documentation to mention the AN985 and created a loadable module. I don't think there are any cards that use this chip on the market yet: the datasheet I got from ADMtek has boxes with big X's in them where the diagrams should be, and the sample boards I got have chips without any artwork on them.
This commit is contained in:
Bill Paul
parent
0cdbe88198
commit
1088f6c7c1
@ -82,7 +82,7 @@ static struct _devname {
|
||||
{ DEVICE_TYPE_FLOPPY, "fd%d", "floppy drive unit A", 2, 0, 64, 4, 'b' },
|
||||
{ DEVICE_TYPE_FLOPPY, "wfd%d", "ATAPI floppy drive unit A", 1, 0, 8, 4, 'b' },
|
||||
{ DEVICE_TYPE_FLOPPY, "worm%d", "SCSI optical disk / CDR", 23, 0, 1, 4, 'b' },
|
||||
{ DEVICE_TYPE_NETWORK, "al", "ADMtek AL981 PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "al", "ADMtek AL981/AN985 PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "ax", "ASIX AX88140A PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "fpa", "DEC DEFPA PCI FDDI card" },
|
||||
{ DEVICE_TYPE_NETWORK, "sr", "SDL T1/E1 sync serial PCI card" },
|
||||
|
||||
@ -85,7 +85,7 @@ sio1 2f8 3 n/a n/a Serial Port 1 (COM2)
|
||||
lpt0 dyn 7 n/a n/a Printer Port 0
|
||||
lpt1 dyn dyn n/a n/a Printer Port 1
|
||||
|
||||
al0 dyn dyn n/a dyn ADMtek AL981 PCI based cards
|
||||
al0 dyn dyn n/a dyn ADMtek AL981/AN985 PCI based cards
|
||||
ax0 dyn dyn n/a dyn ASIX AX88140A PCI based cards
|
||||
de0 n/a n/a n/a n/a DEC DC21x40 PCI based cards
|
||||
(including 21140 100bT cards)
|
||||
@ -373,6 +373,7 @@ Texas Instruments ThunderLAN PCI NICs, including the following:
|
||||
Racore 8148 10baseT/100baseTX/100baseFX multi-personality
|
||||
|
||||
ADMtek AL981-based PCI fast ethernet NICs
|
||||
ADMtek AN985-based PCI fast ethernet NICs
|
||||
|
||||
ASIX Electronics AX88140A PCI NICs, including the following:
|
||||
Alfa Inc. GFC2204
|
||||
|
||||
@ -72,6 +72,9 @@ WaveLAN/IEEE 802.11 and the Cabletron RoamAbout. Both 2Mbps and
|
||||
Driver support has been added for PCI fast ethernet cards based
|
||||
on the ADMtek Inc. AL981 Comet chipset. [MERGED]
|
||||
|
||||
Driver support has been added for PCI fast ethernet cards based
|
||||
on the ADMtek Inc. AN985 Centaur chipset.
|
||||
|
||||
Support has been added for the Rise mP6 processor. [MERGED]
|
||||
|
||||
Driver support has been added for SysKonnect SK-984x PCI gigabit
|
||||
@ -328,6 +331,7 @@ Texas Instruments ThunderLAN PCI NICs, including the following:
|
||||
Racore 8148 10baseT/100baseTX/100baseFX multi-personality
|
||||
|
||||
ADMtek Inc. AL981-based PCI fast ethernet NICs
|
||||
ADMtek Inc. AN985-based PCI fast ethernet NICs
|
||||
|
||||
ASIX Electronics AX88140A PCI NICs, including the following:
|
||||
Alfa Inc. GFC2204
|
||||
|
||||
@ -86,7 +86,7 @@ sio1 2f8 3 n/a n/a Serial Port 1 (COM2)
|
||||
lpt0 dyn 7 n/a n/a Printer Port 0
|
||||
lpt1 dyn dyn n/a n/a Printer Port 1
|
||||
|
||||
al0 dyn dyn n/a dyn ADMtek AL981 PCI based cards
|
||||
al0 dyn dyn n/a dyn ADMtek AL981/AN985 PCI based cards
|
||||
ax0 dyn dyn n/a dyn ASIX AX88140A PCI based cards
|
||||
de0 n/a n/a n/a n/a DEC DC21x40 PCI based cards
|
||||
(including 21140 100bT cards)
|
||||
@ -505,6 +505,7 @@ Texas Instruments ThunderLAN PCI NICs, including the following:
|
||||
Racore 8148 10baseT/100baseTX/100baseFX multi-personality
|
||||
|
||||
ADMtek AL981-based PCI fast ethernet NICs
|
||||
ADMtek AN985-based PCI fast ethernet NICs
|
||||
|
||||
ASIX Electronics AX88140A PCI NICs, including the following:
|
||||
Alfa Inc. GFC2204
|
||||
|
||||
@ -72,6 +72,9 @@ WaveLAN/IEEE 802.11 and the Cabletron RoamAbout. Both 2Mbps and
|
||||
Driver support has been added for PCI fast ethernet cards based
|
||||
on the ADMtek Inc. AL981 Comet chipset. [MERGED]
|
||||
|
||||
Driver support has been added for PCI fast ethernet cards based
|
||||
on the ADMtek Inc. AL985 Centaur chipset.
|
||||
|
||||
Support has been added for the Rise mP6 processor. [MERGED]
|
||||
|
||||
Driver support has been added for SysKonnect SK-984x PCI gigabit
|
||||
@ -328,6 +331,7 @@ Texas Instruments ThunderLAN PCI NICs, including the following:
|
||||
Racore 8148 10baseT/100baseTX/100baseFX multi-personality
|
||||
|
||||
ADMtek Inc. AL981-based PCI fast ethernet NICs
|
||||
ADMtek Inc. AN985-based PCI fast ethernet NICs
|
||||
|
||||
ASIX Electronics AX88140A PCI NICs, including the following:
|
||||
Alfa Inc. GFC2204
|
||||
|
||||
@ -36,25 +36,25 @@
|
||||
.Sh NAME
|
||||
.Nm al
|
||||
.Nd
|
||||
ADMtek Inc. AL981 Comet fast ethernet device driver
|
||||
ADMtek Inc. AL981 Comet and AN985 Centaur fast ethernet device driver
|
||||
.Sh SYNOPSIS
|
||||
.Cd "device al0"
|
||||
.Sh DESCRIPTION
|
||||
The
|
||||
.Nm
|
||||
driver provides support for PCI ethernet adapters and embedded
|
||||
controllers based on the ADMtek Inc. AL981 Comet fast ethernet
|
||||
controller chip.
|
||||
controllers based on the ADMtek Inc. AL981 Comet and AN 985
|
||||
Centaur fast ethernet controller chips.
|
||||
.Pp
|
||||
The ADMtek chip uses bus master DMA and is designed to be a
|
||||
DEC 21x4x workalike. The only major difference between the DEC
|
||||
and ADMtek parts is that the AL981 receiver filter is programmed
|
||||
and ADMtek parts is that the ADMtek receiver filter is programmed
|
||||
using two special registers where as the DEC chip is programmed
|
||||
by uploading a special setup frame via the transmit DMA engine.
|
||||
The AL981 receive filter can only be programmed with a single
|
||||
The AL981 and AN985 can only be programmed with a single
|
||||
perfect filter entry for the local station address and a 64-bit
|
||||
multicast hash table; the DEC filter supports several other
|
||||
options. The ADMtek fast ethernet controller supports both
|
||||
options. The ADMtek fast ethernet controllers support both
|
||||
10 and 100Mbps speeds in either full or half duplex using
|
||||
an internal MII transceiver.
|
||||
.Pp
|
||||
|
||||
@ -36,25 +36,25 @@
|
||||
.Sh NAME
|
||||
.Nm al
|
||||
.Nd
|
||||
ADMtek Inc. AL981 Comet fast ethernet device driver
|
||||
ADMtek Inc. AL981 Comet and AN985 Centaur fast ethernet device driver
|
||||
.Sh SYNOPSIS
|
||||
.Cd "device al0"
|
||||
.Sh DESCRIPTION
|
||||
The
|
||||
.Nm
|
||||
driver provides support for PCI ethernet adapters and embedded
|
||||
controllers based on the ADMtek Inc. AL981 Comet fast ethernet
|
||||
controller chip.
|
||||
controllers based on the ADMtek Inc. AL981 Comet and AN 985
|
||||
Centaur fast ethernet controller chips.
|
||||
.Pp
|
||||
The ADMtek chip uses bus master DMA and is designed to be a
|
||||
DEC 21x4x workalike. The only major difference between the DEC
|
||||
and ADMtek parts is that the AL981 receiver filter is programmed
|
||||
and ADMtek parts is that the ADMtek receiver filter is programmed
|
||||
using two special registers where as the DEC chip is programmed
|
||||
by uploading a special setup frame via the transmit DMA engine.
|
||||
The AL981 receive filter can only be programmed with a single
|
||||
The AL981 and AN985 can only be programmed with a single
|
||||
perfect filter entry for the local station address and a 64-bit
|
||||
multicast hash table; the DEC filter supports several other
|
||||
options. The ADMtek fast ethernet controller supports both
|
||||
options. The ADMtek fast ethernet controllers support both
|
||||
10 and 100Mbps speeds in either full or half duplex using
|
||||
an internal MII transceiver.
|
||||
.Pp
|
||||
|
||||
@ -158,7 +158,6 @@ device ppi0 # Parallel port interface device
|
||||
|
||||
|
||||
# PCI Ethernet NICs.
|
||||
device al0 # ADMtek AL981 (``Comet'')
|
||||
device ax0 # ASIX AX88140A
|
||||
device de0 # DEC/Intel DC21x4x (``Tulip'')
|
||||
device fxp0 # Intel EtherExpress PRO/100B (82557, 82558)
|
||||
@ -169,6 +168,7 @@ device vx0 # 3Com 3c590, 3c595 (``Vortex'')
|
||||
|
||||
# PCI Ethernet NICs that use the common MII bus controller code.
|
||||
controller miibus0 # MII bus support
|
||||
device al0 # ADMtek AL981/AN985 (``Comet''/``Centaur'')
|
||||
device dm0 # Davicom DM9100/DM9102
|
||||
device rl0 # RealTek 8129/8139
|
||||
device sf0 # Adaptec AIC-6915 (``Starfire'')
|
||||
|
||||
@ -1572,7 +1572,7 @@ controller miibus0
|
||||
# FC/AL Host Adapter.
|
||||
#
|
||||
# The `al' device provides support for PCI fast ethernet adapters
|
||||
# based on the ADMtek Inc. AL981 "Comet" chip.
|
||||
# based on the ADMtek Inc. AL981 "Comet" and the AN985 "Centaur" chips.
|
||||
#
|
||||
# The `ax' device provides support for PCI fast ethernet adapters
|
||||
# based on the ASIX Electronics AX88140A chip, including the Alfa
|
||||
|
||||
@ -158,7 +158,6 @@ device ppi0 # Parallel port interface device
|
||||
|
||||
|
||||
# PCI Ethernet NICs.
|
||||
device al0 # ADMtek AL981 (``Comet'')
|
||||
device ax0 # ASIX AX88140A
|
||||
device de0 # DEC/Intel DC21x4x (``Tulip'')
|
||||
device fxp0 # Intel EtherExpress PRO/100B (82557, 82558)
|
||||
@ -169,6 +168,7 @@ device vx0 # 3Com 3c590, 3c595 (``Vortex'')
|
||||
|
||||
# PCI Ethernet NICs that use the common MII bus controller code.
|
||||
controller miibus0 # MII bus support
|
||||
device al0 # ADMtek AL981/AN985 (``Comet''/``Centaur'')
|
||||
device dm0 # Davicom DM9100/DM9102
|
||||
device rl0 # RealTek 8129/8139
|
||||
device sf0 # Adaptec AIC-6915 (``Starfire'')
|
||||
|
||||
@ -1572,7 +1572,7 @@ controller miibus0
|
||||
# FC/AL Host Adapter.
|
||||
#
|
||||
# The `al' device provides support for PCI fast ethernet adapters
|
||||
# based on the ADMtek Inc. AL981 "Comet" chip.
|
||||
# based on the ADMtek Inc. AL981 "Comet" and the AN985 "Centaur" chips.
|
||||
#
|
||||
# The `ax' device provides support for PCI fast ethernet adapters
|
||||
# based on the ASIX Electronics AX88140A chip, including the Alfa
|
||||
|
||||
@ -1572,7 +1572,7 @@ controller miibus0
|
||||
# FC/AL Host Adapter.
|
||||
#
|
||||
# The `al' device provides support for PCI fast ethernet adapters
|
||||
# based on the ADMtek Inc. AL981 "Comet" chip.
|
||||
# based on the ADMtek Inc. AL981 "Comet" and the AN985 "Centaur" chips.
|
||||
#
|
||||
# The `ax' device provides support for PCI fast ethernet adapters
|
||||
# based on the ASIX Electronics AX88140A chip, including the Alfa
|
||||
|
||||
@ -401,7 +401,7 @@ static DEV_INFO device_info[] = {
|
||||
{"xe", "Xircom PC Card Ethernet adapter", 0, CLS_NETWORK},
|
||||
{"ze", "IBM/National Semiconductor PCMCIA Ethernet adapter",0, CLS_NETWORK},
|
||||
{"zp", "3COM PCMCIA Etherlink III Ethernet adapter", 0, CLS_NETWORK},
|
||||
{"al", "ADMtek AL981 ethernet adapter", FLG_FIXED, CLS_NETWORK},
|
||||
{"al", "ADMtek AL981/AN985 ethernet adapter", FLG_FIXED, CLS_NETWORK},
|
||||
{"ax", "ASIX AX88140A ethernet adapter", FLG_FIXED, CLS_NETWORK},
|
||||
{"de", "DEC DC21040 Ethernet adapter", FLG_FIXED, CLS_NETWORK},
|
||||
{"dm", "Davicom DM910x Ethernet adapter", FLG_FIXED, CLS_NETWORK},
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
|
||||
# XXX present but broken: atapi ip_mroute_mod joy pcic
|
||||
|
||||
SUBDIR= ax ccd cd9660 coda dm fdesc fxp if_disc if_ppp if_sl if_tun ipfw \
|
||||
SUBDIR= ax al ccd cd9660 coda dm fdesc fxp if_disc if_ppp if_sl if_tun ipfw \
|
||||
kernfs mfs mii msdos mx nfs ntfs nullfs pn portal procfs rl sf \
|
||||
sis sk ste ti tl umapfs union vn vr wb xl
|
||||
|
||||
|
||||
34
sys/modules/al/Makefile
Normal file
34
sys/modules/al/Makefile
Normal file
@ -0,0 +1,34 @@
|
||||
# $FreeBSD$
|
||||
|
||||
S = ${.CURDIR}/../..
|
||||
.PATH: $S/pci
|
||||
KMOD = al
|
||||
SRCS = if_al.c al.h bpf.h opt_bdg.h device_if.h bus_if.h pci_if.h
|
||||
SRCS += miibus_if.h
|
||||
CLEANFILES += al.h bpf.h opt_bdg.h device_if.h bus_if.h pci_if.h
|
||||
CLEANFILES += miibus_if.h
|
||||
CFLAGS += ${DEBUG_FLAGS}
|
||||
KMODDEPS = miibus
|
||||
|
||||
al.h:
|
||||
echo "#define NAL 1" > al.h
|
||||
|
||||
bpf.h:
|
||||
echo "#define NBPF 1" > bpf.h
|
||||
|
||||
opt_bdg.h:
|
||||
touch opt_bdg.h
|
||||
|
||||
device_if.h: $S/kern/makedevops.pl $S/kern/device_if.m
|
||||
perl $S/kern/makedevops.pl -h $S/kern/device_if.m
|
||||
|
||||
bus_if.h: $S/kern/makedevops.pl $S/kern/bus_if.m
|
||||
perl $S/kern/makedevops.pl -h $S/kern/bus_if.m
|
||||
|
||||
pci_if.h: $S/kern/makedevops.pl $S/pci/pci_if.m
|
||||
perl $S/kern/makedevops.pl -h $S/pci/pci_if.m
|
||||
|
||||
miibus_if.h: $S/kern/makedevops.pl $S/dev/mii/miibus_if.m
|
||||
perl $S/kern/makedevops.pl -h $S/dev/mii/miibus_if.m
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
1537
sys/pci/if_al.c
1537
sys/pci/if_al.c
File diff suppressed because it is too large
Load Diff
@ -214,6 +214,10 @@
|
||||
#define AL_SIO_EESEL 0x00000800
|
||||
#define AL_SIO_ROMCTL_WRITE 0x00002000
|
||||
#define AL_SIO_ROMCTL_READ 0x00004000
|
||||
#define AL_SIO_MII_CLK 0x00010000 /* MDIO clock */
|
||||
#define AL_SIO_MII_DATAOUT 0x00020000 /* MDIO data out */
|
||||
#define AL_SIO_MII_DIR 0x00040000 /* MDIO dir */
|
||||
#define AL_SIO_MII_DATAIN 0x00080000 /* MDIO data in */
|
||||
|
||||
#define AL_EECMD_WRITE 0x140
|
||||
#define AL_EECMD_READ 0x180
|
||||
@ -348,10 +352,16 @@ struct al_wakup_record {
|
||||
*/
|
||||
|
||||
struct al_desc {
|
||||
volatile u_int32_t al_status;
|
||||
volatile u_int32_t al_ctl;
|
||||
volatile u_int32_t al_ptr1;
|
||||
volatile u_int32_t al_ptr2;
|
||||
u_int32_t al_status;
|
||||
u_int32_t al_ctl;
|
||||
u_int32_t al_ptr1;
|
||||
u_int32_t al_ptr2;
|
||||
/* Driver specific stuff. */
|
||||
#ifdef __i386__
|
||||
u_int32_t al_pad;
|
||||
#endif
|
||||
struct mbuf *al_mbuf;
|
||||
struct al_desc *al_nextdesc;
|
||||
};
|
||||
|
||||
#define al_data al_ptr1
|
||||
@ -378,6 +388,7 @@ struct al_desc {
|
||||
|
||||
#define AL_RXCTL_BUFLEN1 0x00000FFF
|
||||
#define AL_RXCTL_BUFLEN2 0x00FFF000
|
||||
#define AL_RXCTL_RLINK 0x01000000
|
||||
#define AL_RXCTL_RLAST 0x02000000
|
||||
|
||||
#define AL_TXSTAT_DEFER 0x00000001
|
||||
@ -407,51 +418,20 @@ struct al_desc {
|
||||
#define AL_RX_LIST_CNT 64
|
||||
#define AL_TX_LIST_CNT 128
|
||||
#define AL_MIN_FRAMELEN 60
|
||||
#define AL_RXLEN 1536
|
||||
|
||||
/*
|
||||
* A tx 'super descriptor' is actually 16 regular descriptors
|
||||
* back to back.
|
||||
*/
|
||||
struct al_txdesc {
|
||||
volatile struct al_desc al_frag[AL_MAXFRAGS];
|
||||
};
|
||||
|
||||
#define AL_TXNEXT(x) x->al_ptr->al_frag[x->al_lastdesc].al_next
|
||||
#define AL_TXSTATUS(x) x->al_ptr->al_frag[x->al_lastdesc].al_status
|
||||
#define AL_TXCTL(x) x->al_ptr->al_frag[x->al_lastdesc].al_ctl
|
||||
#define AL_TXDATA(x) x->al_ptr->al_frag[x->al_lastdesc].al_data
|
||||
|
||||
#define AL_TXOWN(x) x->al_ptr->al_frag[0].al_status
|
||||
|
||||
#define AL_UNSENT 0x12341234
|
||||
#define AL_INC(x, y) (x) = (x + 1) % y
|
||||
|
||||
struct al_list_data {
|
||||
volatile struct al_desc al_rx_list[AL_RX_LIST_CNT];
|
||||
volatile struct al_txdesc al_tx_list[AL_TX_LIST_CNT];
|
||||
};
|
||||
|
||||
struct al_chain {
|
||||
volatile struct al_txdesc *al_ptr;
|
||||
struct mbuf *al_mbuf;
|
||||
struct al_chain *al_nextdesc;
|
||||
u_int8_t al_lastdesc;
|
||||
};
|
||||
|
||||
struct al_chain_onefrag {
|
||||
volatile struct al_desc *al_ptr;
|
||||
struct mbuf *al_mbuf;
|
||||
struct al_chain_onefrag *al_nextdesc;
|
||||
struct al_desc al_rx_list[AL_RX_LIST_CNT];
|
||||
struct al_desc al_tx_list[AL_TX_LIST_CNT];
|
||||
};
|
||||
|
||||
struct al_chain_data {
|
||||
struct al_chain_onefrag al_rx_chain[AL_RX_LIST_CNT];
|
||||
struct al_chain al_tx_chain[AL_TX_LIST_CNT];
|
||||
|
||||
struct al_chain_onefrag *al_rx_head;
|
||||
|
||||
struct al_chain *al_tx_head;
|
||||
struct al_chain *al_tx_tail;
|
||||
struct al_chain *al_tx_free;
|
||||
int al_tx_prod;
|
||||
int al_tx_cons;
|
||||
int al_tx_cnt;
|
||||
int al_rx_prod;
|
||||
};
|
||||
|
||||
struct al_type {
|
||||
@ -469,35 +449,27 @@ struct al_mii_frame {
|
||||
u_int16_t mii_data;
|
||||
};
|
||||
|
||||
/*
|
||||
* MII constants
|
||||
*/
|
||||
#define AL_MII_STARTDELIM 0x01
|
||||
#define AL_MII_READOP 0x02
|
||||
#define AL_MII_WRITEOP 0x01
|
||||
#define AL_MII_TURNAROUND 0x02
|
||||
|
||||
#define AL_FLAG_FORCEDELAY 1
|
||||
#define AL_FLAG_SCHEDDELAY 2
|
||||
#define AL_FLAG_DELAYTIMEO 3
|
||||
|
||||
struct al_softc {
|
||||
struct arpcom arpcom; /* interface info */
|
||||
struct ifmedia ifmedia; /* media info */
|
||||
bus_space_handle_t al_bhandle; /* bus space handle */
|
||||
bus_space_tag_t al_btag; /* bus space tag */
|
||||
struct resource *al_res;
|
||||
struct resource *al_irq;
|
||||
void *al_intrhand;
|
||||
device_t al_miibus;
|
||||
struct al_type *al_info; /* COMET adapter info */
|
||||
struct al_type *al_pinfo; /* phy info */
|
||||
int al_did;
|
||||
u_int8_t al_unit; /* interface number */
|
||||
u_int8_t al_type;
|
||||
u_int8_t al_phy_addr; /* PHY address */
|
||||
u_int8_t al_tx_pend; /* TX pending */
|
||||
u_int8_t al_want_auto;
|
||||
u_int8_t al_autoneg;
|
||||
caddr_t al_ldata_ptr;
|
||||
struct al_list_data *al_ldata;
|
||||
struct al_chain_data al_cdata;
|
||||
u_int8_t al_cachesize;
|
||||
struct callout_handle al_stat_ch;
|
||||
};
|
||||
|
||||
/*
|
||||
@ -518,6 +490,7 @@ struct al_softc {
|
||||
bus_space_read_1(sc->al_btag, sc->al_bhandle, reg)
|
||||
|
||||
#define AL_TIMEOUT 1000
|
||||
#define ETHER_ALIGN 2
|
||||
|
||||
/*
|
||||
* General constants that are fun to know.
|
||||
@ -532,36 +505,9 @@ struct al_softc {
|
||||
#define AL_DEVICEID_AL981 0x0981
|
||||
|
||||
/*
|
||||
* Texas Instruments PHY identifiers
|
||||
* AN985 device IDs.
|
||||
*/
|
||||
#define TI_PHY_VENDORID 0x4000
|
||||
#define TI_PHY_10BT 0x501F
|
||||
#define TI_PHY_100VGPMI 0x502F
|
||||
|
||||
/*
|
||||
* These ID values are for the NS DP83840A 10/100 PHY
|
||||
*/
|
||||
#define NS_PHY_VENDORID 0x2000
|
||||
#define NS_PHY_83840A 0x5C0F
|
||||
|
||||
/*
|
||||
* Level 1 10/100 PHY
|
||||
*/
|
||||
#define LEVEL1_PHY_VENDORID 0x7810
|
||||
#define LEVEL1_PHY_LXT970 0x000F
|
||||
|
||||
/*
|
||||
* Intel 82555 10/100 PHY
|
||||
*/
|
||||
#define INTEL_PHY_VENDORID 0x0A28
|
||||
#define INTEL_PHY_82555 0x015F
|
||||
|
||||
/*
|
||||
* SEEQ 80220 10/100 PHY
|
||||
*/
|
||||
#define SEEQ_PHY_VENDORID 0x0016
|
||||
#define SEEQ_PHY_80220 0xF83F
|
||||
|
||||
#define AL_DEVICEID_AN985 0x0985
|
||||
|
||||
/*
|
||||
* PCI low memory base and low I/O base register, and
|
||||
@ -601,105 +547,6 @@ struct al_softc {
|
||||
#define AL_PME_EN 0x0010
|
||||
#define AL_PME_STATUS 0x8000
|
||||
|
||||
#define PHY_UNKNOWN 6
|
||||
|
||||
#define AL_PHYADDR_MIN 0x00
|
||||
#define AL_PHYADDR_MAL 0x1F
|
||||
|
||||
#define PHY_BMCR 0x00
|
||||
#define PHY_BMSR 0x01
|
||||
#define PHY_VENID 0x02
|
||||
#define PHY_DEVID 0x03
|
||||
#define PHY_ANAR 0x04
|
||||
#define PHY_LPAR 0x05
|
||||
#define PHY_ANEXP 0x06
|
||||
|
||||
#define PHY_ANAR_NEXTPAGE 0x8000
|
||||
#define PHY_ANAR_RSVD0 0x4000
|
||||
#define PHY_ANAR_TLRFLT 0x2000
|
||||
#define PHY_ANAR_RSVD1 0x1000
|
||||
#define PHY_ANAR_RSVD2 0x0800
|
||||
#define PHY_ANAR_RSVD3 0x0400
|
||||
#define PHY_ANAR_100BT4 0x0200
|
||||
#define PHY_ANAR_100BTXFULL 0x0100
|
||||
#define PHY_ANAR_100BTXHALF 0x0080
|
||||
#define PHY_ANAR_10BTFULL 0x0040
|
||||
#define PHY_ANAR_10BTHALF 0x0020
|
||||
#define PHY_ANAR_PROTO4 0x0010
|
||||
#define PHY_ANAR_PROTO3 0x0008
|
||||
#define PHY_ANAR_PROTO2 0x0004
|
||||
#define PHY_ANAR_PROTO1 0x0002
|
||||
#define PHY_ANAR_PROTO0 0x0001
|
||||
|
||||
/*
|
||||
* These are the register definitions for the PHY (physical layer
|
||||
* interface chip).
|
||||
*/
|
||||
/*
|
||||
* PHY BMCR Basic Mode Control Register
|
||||
*/
|
||||
#define PHY_BMCR_RESET 0x8000
|
||||
#define PHY_BMCR_LOOPBK 0x4000
|
||||
#define PHY_BMCR_SPEEDSEL 0x2000
|
||||
#define PHY_BMCR_AUTONEGENBL 0x1000
|
||||
#define PHY_BMCR_RSVD0 0x0800 /* write as zero */
|
||||
#define PHY_BMCR_ISOLATE 0x0400
|
||||
#define PHY_BMCR_AUTONEGRSTR 0x0200
|
||||
#define PHY_BMCR_DUPLEX 0x0100
|
||||
#define PHY_BMCR_COLLTEST 0x0080
|
||||
#define PHY_BMCR_RSVD1 0x0040 /* write as zero, don't care */
|
||||
#define PHY_BMCR_RSVD2 0x0020 /* write as zero, don't care */
|
||||
#define PHY_BMCR_RSVD3 0x0010 /* write as zero, don't care */
|
||||
#define PHY_BMCR_RSVD4 0x0008 /* write as zero, don't care */
|
||||
#define PHY_BMCR_RSVD5 0x0004 /* write as zero, don't care */
|
||||
#define PHY_BMCR_RSVD6 0x0002 /* write as zero, don't care */
|
||||
#define PHY_BMCR_RSVD7 0x0001 /* write as zero, don't care */
|
||||
/*
|
||||
* RESET: 1 == software reset, 0 == normal operation
|
||||
* Resets status and control registers to default values.
|
||||
* Relatches all hardware config values.
|
||||
*
|
||||
* LOOPBK: 1 == loopback operation enabled, 0 == normal operation
|
||||
*
|
||||
* SPEEDSEL: 1 == 100Mb/s, 0 == 10Mb/s
|
||||
* Link speed is selected byt his bit or if auto-negotiation if bit
|
||||
* 12 (AUTONEGENBL) is set (in which case the value of this register
|
||||
* is ignored).
|
||||
*
|
||||
* AUTONEGENBL: 1 == Autonegotiation enabled, 0 == Autonegotiation disabled
|
||||
* Bits 8 and 13 are ignored when autoneg is set, otherwise bits 8 and 13
|
||||
* determine speed and mode. Should be cleared and then set if PHY configured
|
||||
* for no autoneg on startup.
|
||||
*
|
||||
* ISOLATE: 1 == isolate PHY from MII, 0 == normal operation
|
||||
*
|
||||
* AUTONEGRSTR: 1 == restart autonegotiation, 0 = normal operation
|
||||
*
|
||||
* DUPLEX: 1 == full duplex mode, 0 == half duplex mode
|
||||
*
|
||||
* COLLTEST: 1 == collision test enabled, 0 == normal operation
|
||||
*/
|
||||
|
||||
/*
|
||||
* PHY, BMSR Basic Mode Status Register
|
||||
*/
|
||||
#define PHY_BMSR_100BT4 0x8000
|
||||
#define PHY_BMSR_100BTXFULL 0x4000
|
||||
#define PHY_BMSR_100BTXHALF 0x2000
|
||||
#define PHY_BMSR_10BTFULL 0x1000
|
||||
#define PHY_BMSR_10BTHALF 0x0800
|
||||
#define PHY_BMSR_RSVD1 0x0400 /* write as zero, don't care */
|
||||
#define PHY_BMSR_RSVD2 0x0200 /* write as zero, don't care */
|
||||
#define PHY_BMSR_RSVD3 0x0100 /* write as zero, don't care */
|
||||
#define PHY_BMSR_RSVD4 0x0080 /* write as zero, don't care */
|
||||
#define PHY_BMSR_MFPRESUP 0x0040
|
||||
#define PHY_BMSR_AUTONEGCOMP 0x0020
|
||||
#define PHY_BMSR_REMFAULT 0x0010
|
||||
#define PHY_BMSR_CANAUTONEG 0x0008
|
||||
#define PHY_BMSR_LINKSTAT 0x0004
|
||||
#define PHY_BMSR_JABBER 0x0002
|
||||
#define PHY_BMSR_EXTENDED 0x0001
|
||||
|
||||
#ifdef __alpha__
|
||||
#undef vtophys
|
||||
#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
|
||||
|
||||
@ -82,7 +82,7 @@ static struct _devname {
|
||||
{ DEVICE_TYPE_FLOPPY, "fd%d", "floppy drive unit A", 2, 0, 64, 4, 'b' },
|
||||
{ DEVICE_TYPE_FLOPPY, "wfd%d", "ATAPI floppy drive unit A", 1, 0, 8, 4, 'b' },
|
||||
{ DEVICE_TYPE_FLOPPY, "worm%d", "SCSI optical disk / CDR", 23, 0, 1, 4, 'b' },
|
||||
{ DEVICE_TYPE_NETWORK, "al", "ADMtek AL981 PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "al", "ADMtek AL981/AN985 PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "ax", "ASIX AX88140A PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "fpa", "DEC DEFPA PCI FDDI card" },
|
||||
{ DEVICE_TYPE_NETWORK, "sr", "SDL T1/E1 sync serial PCI card" },
|
||||
|
||||
@ -82,7 +82,7 @@ static struct _devname {
|
||||
{ DEVICE_TYPE_FLOPPY, "fd%d", "floppy drive unit A", 2, 0, 64, 4, 'b' },
|
||||
{ DEVICE_TYPE_FLOPPY, "wfd%d", "ATAPI floppy drive unit A", 1, 0, 8, 4, 'b' },
|
||||
{ DEVICE_TYPE_FLOPPY, "worm%d", "SCSI optical disk / CDR", 23, 0, 1, 4, 'b' },
|
||||
{ DEVICE_TYPE_NETWORK, "al", "ADMtek AL981 PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "al", "ADMtek AL981/AN985 PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "ax", "ASIX AX88140A PCI ethernet card" },
|
||||
{ DEVICE_TYPE_NETWORK, "fpa", "DEC DEFPA PCI FDDI card" },
|
||||
{ DEVICE_TYPE_NETWORK, "sr", "SDL T1/E1 sync serial PCI card" },
|
||||
|
||||
Loading…
Reference in New Issue
Block a user