- Move enable_sse()'s prototype to machine/md_var.h.

- Sort definition of cpu_* variables appropriately.
- Move cpu_fxsr out of the magic non-BSS set of variables and stick it in
  the BSS along with hw_instruction_sse (make the latter static as well).

Submitted by:	bde (partially)

sys/amd64/amd64/initcpu.c

@@ -70,24 +70,23 @@ static void	init_6x86MX(void);
 static void	init_ppro(void);
 static void	init_mendocino(void);
 #endif
-void	enable_sse(void);
 
-int	hw_instruction_sse = 0;
+static int	hw_instruction_sse;
 SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
-	   &hw_instruction_sse, 0,
-	   "SIMD/MMX2 instructions available in CPU");
+    &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU");
 
 /* Must *NOT* be BSS or locore will bzero these after setting them */
 int	cpu = 0;		/* Are we 386, 386sx, 486, etc? */
-u_int	cpu_id = 0;		/* Stepping ID */
 u_int	cpu_feature = 0;	/* Feature flags */
 u_int	cpu_high = 0;		/* Highest arg to CPUID */
+u_int	cpu_id = 0;		/* Stepping ID */
 u_int	cpu_procinfo = 0;	/* HyperThreading Info / Brand Index / CLFUSH */
-#ifdef CPU_ENABLE_SSE
-u_int	cpu_fxsr = 0;		/* SSE enabled */
-#endif
 char	cpu_vendor[20] = "";	/* CPU Origin code */
 
+#ifdef CPU_ENABLE_SSE
+u_int	cpu_fxsr;		/* SSE enabled */
+#endif
+
 #ifdef I486_CPU
 /*
  * IBM Blue Lightning

sys/amd64/amd64/mp_machdep.c

@@ -2523,8 +2523,6 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
-extern void	enable_sse(void);
-
 void
 ap_init(void)
 {

sys/amd64/amd64/mptable.c

@@ -2523,8 +2523,6 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
-extern void	enable_sse(void);
-
 void
 ap_init(void)
 {

sys/amd64/include/md_var.h

@@ -44,10 +44,10 @@ extern	int	(*copyin_vector)(const void *udaddr, void *kaddr, size_t len);
 extern	int	(*copyout_vector)(const void *kaddr, void *udaddr, size_t len);
 extern	u_int	cpu_exthigh;
 extern	u_int	cpu_feature;
-extern	u_int	cpu_high;
-extern	u_int	cpu_procinfo;
-extern	u_int	cpu_id;
 extern	u_int	cpu_fxsr;
+extern	u_int	cpu_high;
+extern	u_int	cpu_id;
+extern	u_int	cpu_procinfo;
 extern	char	cpu_vendor[];
 extern	u_int	cyrix_did;
 extern	uint16_t *elan_mmcr;
@@ -86,6 +86,7 @@ void	doreti_popl_es(void) __asm(__STRING(doreti_popl_es));
 void	doreti_popl_es_fault(void) __asm(__STRING(doreti_popl_es_fault));
 void	doreti_popl_fs(void) __asm(__STRING(doreti_popl_fs));
 void	doreti_popl_fs_fault(void) __asm(__STRING(doreti_popl_fs_fault));
+void	enable_sse(void);
 void	fillw(int /*u_short*/ pat, void *base, size_t cnt);
 void	i486_bzero(void *buf, size_t len);
 void	i586_bcopy(const void *from, void *to, size_t len);

sys/amd64/include/mptable.h

@@ -2523,8 +2523,6 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
-extern void	enable_sse(void);
-
 void
 ap_init(void)
 {

sys/i386/i386/initcpu.c

@@ -70,24 +70,23 @@ static void	init_6x86MX(void);
 static void	init_ppro(void);
 static void	init_mendocino(void);
 #endif
-void	enable_sse(void);
 
-int	hw_instruction_sse = 0;
+static int	hw_instruction_sse;
 SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
-	   &hw_instruction_sse, 0,
-	   "SIMD/MMX2 instructions available in CPU");
+    &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU");
 
 /* Must *NOT* be BSS or locore will bzero these after setting them */
 int	cpu = 0;		/* Are we 386, 386sx, 486, etc? */
-u_int	cpu_id = 0;		/* Stepping ID */
 u_int	cpu_feature = 0;	/* Feature flags */
 u_int	cpu_high = 0;		/* Highest arg to CPUID */
+u_int	cpu_id = 0;		/* Stepping ID */
 u_int	cpu_procinfo = 0;	/* HyperThreading Info / Brand Index / CLFUSH */
-#ifdef CPU_ENABLE_SSE
-u_int	cpu_fxsr = 0;		/* SSE enabled */
-#endif
 char	cpu_vendor[20] = "";	/* CPU Origin code */
 
+#ifdef CPU_ENABLE_SSE
+u_int	cpu_fxsr;		/* SSE enabled */
+#endif
+
 #ifdef I486_CPU
 /*
  * IBM Blue Lightning

sys/i386/i386/mp_machdep.c

@@ -2523,8 +2523,6 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
-extern void	enable_sse(void);
-
 void
 ap_init(void)
 {

sys/i386/i386/mptable.c

@@ -2523,8 +2523,6 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
-extern void	enable_sse(void);
-
 void
 ap_init(void)
 {

sys/i386/include/md_var.h

@@ -44,10 +44,10 @@ extern	int	(*copyin_vector)(const void *udaddr, void *kaddr, size_t len);
 extern	int	(*copyout_vector)(const void *kaddr, void *udaddr, size_t len);
 extern	u_int	cpu_exthigh;
 extern	u_int	cpu_feature;
-extern	u_int	cpu_high;
-extern	u_int	cpu_procinfo;
-extern	u_int	cpu_id;
 extern	u_int	cpu_fxsr;
+extern	u_int	cpu_high;
+extern	u_int	cpu_id;
+extern	u_int	cpu_procinfo;
 extern	char	cpu_vendor[];
 extern	u_int	cyrix_did;
 extern	uint16_t *elan_mmcr;
@@ -86,6 +86,7 @@ void	doreti_popl_es(void) __asm(__STRING(doreti_popl_es));
 void	doreti_popl_es_fault(void) __asm(__STRING(doreti_popl_es_fault));
 void	doreti_popl_fs(void) __asm(__STRING(doreti_popl_fs));
 void	doreti_popl_fs_fault(void) __asm(__STRING(doreti_popl_fs_fault));
+void	enable_sse(void);
 void	fillw(int /*u_short*/ pat, void *base, size_t cnt);
 void	i486_bzero(void *buf, size_t len);
 void	i586_bcopy(const void *from, void *to, size_t len);

sys/i386/include/mptable.h

@@ -2523,8 +2523,6 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
  * This is called once the rest of the system is up and running and we're
  * ready to let the AP's out of the pen.
  */
-extern void	enable_sse(void);
-
 void
 ap_init(void)
 {