Add a sysctl to dump kernel mappings and their properties on amd64.
The sysctl is called vm.pmap.kernel_maps. It dumps address ranges and their corresponding protection and mapping mode, as well as counts of 2MB and 1GB pages in the range. Reviewed by: kib MFC after: 2 weeks Sponsored by: Netflix Differential Revision: https://reviews.freebsd.org/D21380
This commit is contained in:
markj
parent
628e9ea4a8
commit
116c38c27d
@ -124,6 +124,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/proc.h>
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#include <sys/rangeset.h>
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#include <sys/rwlock.h>
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#include <sys/sbuf.h>
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#include <sys/sx.h>
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#include <sys/turnstile.h>
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#include <sys/vmem.h>
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@ -2112,6 +2113,41 @@ pmap_cache_mask(pmap_t pmap, boolean_t is_pde)
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return (mask);
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}
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static int
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pmap_pat_index(pmap_t pmap, pt_entry_t pte, bool is_pde)
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{
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int pat_flag, pat_idx;
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pat_idx = 0;
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switch (pmap->pm_type) {
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case PT_X86:
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case PT_RVI:
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/* The PAT bit is different for PTE's and PDE's. */
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pat_flag = is_pde ? X86_PG_PDE_PAT : X86_PG_PTE_PAT;
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if ((pte & pat_flag) != 0)
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pat_idx |= 0x4;
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if ((pte & PG_NC_PCD) != 0)
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pat_idx |= 0x2;
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if ((pte & PG_NC_PWT) != 0)
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pat_idx |= 0x1;
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break;
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case PT_EPT:
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if ((pte & EPT_PG_IGNORE_PAT) != 0)
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panic("EPT PTE %#lx has no PAT memory type", pte);
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pat_idx = (pte & EPT_PG_MEMORY_TYPE(0x7)) >> 3;
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break;
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}
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/* See pmap_init_pat(). */
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if (pat_idx == 4)
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pat_idx = 0;
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if (pat_idx == 7)
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pat_idx = 3;
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return (pat_idx);
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}
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bool
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pmap_ps_enabled(pmap_t pmap)
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{
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@ -9981,6 +10017,268 @@ pmap_pkru_clear(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
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return (error);
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}
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/*
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* Track a range of the kernel's virtual address space that is contiguous
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* in various mapping attributes.
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*/
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struct pmap_kernel_map_range {
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vm_offset_t sva;
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pt_entry_t attrs;
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int ptes;
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int pdes;
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int pdpes;
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};
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static void
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sysctl_kmaps_dump(struct sbuf *sb, struct pmap_kernel_map_range *range,
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vm_offset_t eva)
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{
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const char *mode;
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int i, pat_idx;
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if (eva <= range->sva)
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return;
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pat_idx = pmap_pat_index(kernel_pmap, range->attrs, true);
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for (i = 0; i < PAT_INDEX_SIZE; i++)
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if (pat_index[i] == pat_idx)
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break;
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switch (i) {
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case PAT_WRITE_BACK:
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mode = "WB";
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break;
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case PAT_WRITE_THROUGH:
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mode = "WT";
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break;
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case PAT_UNCACHEABLE:
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mode = "UC";
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break;
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case PAT_WRITE_PROTECTED:
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mode = "WP";
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break;
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case PAT_WRITE_COMBINING:
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mode = "WC";
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break;
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default:
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printf("%s: unknown PAT mode %#x for range %#016lx-%#016lx\n",
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__func__, i, range->sva, eva);
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mode = "??";
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break;
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}
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sbuf_printf(sb, "%#016lx-%#016lx r%c%c%c%c %s %d %d %d\n",
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range->sva, eva,
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(range->attrs & X86_PG_RW) != 0 ? 'w' : '-',
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(range->attrs & pg_nx) != 0 ? '-' : 'x',
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(range->attrs & X86_PG_U) != 0 ? 'u' : 's',
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(range->attrs & X86_PG_G) != 0 ? 'g' : '-',
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mode, range->pdpes, range->pdes, range->ptes);
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/* Reset to sentinel value. */
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range->sva = KVADDR(NPML4EPG - 1, NPDPEPG - 1, NPDEPG - 1, NPTEPG - 1);
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}
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/*
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* Determine whether the attributes specified by a page table entry match those
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* being tracked by the current range. This is not quite as simple as a direct
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* flag comparison since some PAT modes have multiple representations.
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*/
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static bool
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sysctl_kmaps_match(struct pmap_kernel_map_range *range, pt_entry_t attrs)
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{
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pt_entry_t diff, mask;
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mask = X86_PG_G | X86_PG_RW | X86_PG_U | X86_PG_PDE_CACHE | pg_nx;
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diff = (range->attrs ^ attrs) & mask;
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if (diff == 0)
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return (true);
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if ((diff & ~X86_PG_PDE_PAT) == 0 &&
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pmap_pat_index(kernel_pmap, range->attrs, true) ==
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pmap_pat_index(kernel_pmap, attrs, true))
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return (true);
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return (false);
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}
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static void
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sysctl_kmaps_reinit(struct pmap_kernel_map_range *range, vm_offset_t va,
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pt_entry_t attrs)
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{
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memset(range, 0, sizeof(*range));
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range->sva = va;
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range->attrs = attrs;
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}
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/*
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* Given a leaf PTE, derive the mapping's attributes. If they do not match
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* those of the current run, dump the address range and its attributes, and
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* begin a new run.
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*/
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static void
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sysctl_kmaps_check(struct sbuf *sb, struct pmap_kernel_map_range *range,
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vm_offset_t va, pml4_entry_t pml4e, pdp_entry_t pdpe, pd_entry_t pde,
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pt_entry_t pte)
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{
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pt_entry_t attrs;
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attrs = pml4e & (X86_PG_RW | X86_PG_U | pg_nx);
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attrs |= pdpe & pg_nx;
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attrs &= pg_nx | (pdpe & (X86_PG_RW | X86_PG_U));
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if ((pdpe & PG_PS) != 0) {
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attrs |= pdpe & (X86_PG_G | X86_PG_PDE_CACHE);
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} else if (pde != 0) {
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attrs |= pde & pg_nx;
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attrs &= pg_nx | (pde & (X86_PG_RW | X86_PG_U));
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}
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if ((pde & PG_PS) != 0) {
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attrs |= pde & (X86_PG_G | X86_PG_PDE_CACHE);
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} else if (pte != 0) {
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attrs |= pte & pg_nx;
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attrs &= pg_nx | (pte & (X86_PG_RW | X86_PG_U));
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attrs |= pte & (X86_PG_G | X86_PG_PTE_CACHE);
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/* Canonicalize by always using the PDE PAT bit. */
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if ((attrs & X86_PG_PTE_PAT) != 0)
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attrs ^= X86_PG_PDE_PAT | X86_PG_PTE_PAT;
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}
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if (range->sva > va || !sysctl_kmaps_match(range, attrs)) {
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sysctl_kmaps_dump(sb, range, va);
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sysctl_kmaps_reinit(range, va, attrs);
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}
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}
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static int
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sysctl_kmaps(SYSCTL_HANDLER_ARGS)
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{
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struct pmap_kernel_map_range range;
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struct sbuf sbuf, *sb;
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pml4_entry_t pml4e;
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pdp_entry_t *pdp, pdpe;
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pd_entry_t *pd, pde;
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pt_entry_t *pt, pte;
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vm_offset_t sva;
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vm_paddr_t pa;
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int error, i, j, k, l;
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error = sysctl_wire_old_buffer(req, 0);
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if (error != 0)
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return (error);
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sb = &sbuf;
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sbuf_new_for_sysctl(sb, NULL, PAGE_SIZE, req);
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/* Sentinel value. */
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range.sva = KVADDR(NPML4EPG - 1, NPDPEPG - 1, NPDEPG - 1, NPTEPG - 1);
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/*
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* Iterate over the kernel page tables without holding the kernel pmap
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* lock. Outside of the large map, kernel page table pages are never
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* freed, so at worst we will observe inconsistencies in the output.
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* Within the large map, ensure that PDP and PD page addresses are
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* valid before descending.
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*/
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for (sva = 0, i = pmap_pml4e_index(sva); i < NPML4EPG; i++) {
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switch (i) {
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case PML4PML4I:
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sbuf_printf(sb, "\nRecursive map:\n");
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break;
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case DMPML4I:
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sbuf_printf(sb, "\nDirect map:\n");
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break;
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case KPML4BASE:
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sbuf_printf(sb, "\nKernel map:\n");
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break;
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case LMSPML4I:
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sbuf_printf(sb, "\nLarge map:\n");
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break;
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}
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/* Convert to canonical form. */
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if (sva == 1ul << 47)
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sva |= -1ul << 48;
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restart:
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pml4e = kernel_pmap->pm_pml4[i];
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if ((pml4e & X86_PG_V) == 0) {
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sva = rounddown2(sva, NBPML4);
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sysctl_kmaps_dump(sb, &range, sva);
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sva += NBPML4;
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continue;
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}
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pa = pml4e & PG_FRAME;
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pdp = (pdp_entry_t *)PHYS_TO_DMAP(pa);
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for (j = pmap_pdpe_index(sva); j < NPDPEPG; j++) {
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pdpe = pdp[j];
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if ((pdpe & X86_PG_V) == 0) {
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sva = rounddown2(sva, NBPDP);
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sysctl_kmaps_dump(sb, &range, sva);
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sva += NBPDP;
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continue;
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}
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pa = pdpe & PG_FRAME;
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if (PMAP_ADDRESS_IN_LARGEMAP(sva) &&
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vm_phys_paddr_to_vm_page(pa) == NULL)
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goto restart;
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if ((pdpe & PG_PS) != 0) {
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sva = rounddown2(sva, NBPDP);
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sysctl_kmaps_check(sb, &range, sva, pml4e, pdpe,
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0, 0);
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range.pdpes++;
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sva += NBPDP;
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continue;
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}
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pd = (pd_entry_t *)PHYS_TO_DMAP(pa);
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for (k = pmap_pde_index(sva); k < NPDEPG; k++) {
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pde = pd[k];
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if ((pde & X86_PG_V) == 0) {
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sva = rounddown2(sva, NBPDR);
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sysctl_kmaps_dump(sb, &range, sva);
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sva += NBPDR;
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continue;
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}
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pa = pde & PG_FRAME;
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if (PMAP_ADDRESS_IN_LARGEMAP(sva) &&
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vm_phys_paddr_to_vm_page(pa) == NULL)
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goto restart;
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if ((pde & PG_PS) != 0) {
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sva = rounddown2(sva, NBPDR);
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sysctl_kmaps_check(sb, &range, sva,
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pml4e, pdpe, pde, 0);
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range.pdes++;
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sva += NBPDR;
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continue;
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}
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pt = (pt_entry_t *)PHYS_TO_DMAP(pa);
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for (l = pmap_pte_index(sva); l < NPTEPG; l++,
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sva += PAGE_SIZE) {
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pte = pt[l];
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if ((pte & X86_PG_V) == 0) {
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sysctl_kmaps_dump(sb, &range,
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sva);
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continue;
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}
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sysctl_kmaps_check(sb, &range, sva,
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pml4e, pdpe, pde, pte);
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range.ptes++;
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}
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}
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}
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}
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error = sbuf_finish(sb);
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sbuf_delete(sb);
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return (error);
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}
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SYSCTL_OID(_vm_pmap, OID_AUTO, kernel_maps,
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CTLTYPE_STRING | CTLFLAG_RD | CTLFLAG_MPSAFE,
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NULL, 0, sysctl_kmaps, "A",
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"Dump kernel address layout");
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#ifdef DDB
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DB_SHOW_COMMAND(pte, pmap_print_pte)
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{
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