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- Add new register definitions

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- Enable the controller and wait for the PLL to start

Submitted by:	Hans Petter Selasky
This commit is contained in:
thompsa 2009-05-20 17:00:55 +00:00
parent c4760857a3
commit 11e78dd2a5
2 changed files with 45 additions and 10 deletions
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39
sys/dev/usb/controller/atmegadci.c
View File

@ -672,7 +672,7 @@ atmegadci_interrupt(struct atmegadci_softc *sc)
* that like RESUME. Resume is set when there is at least 3
* milliseconds of inactivity on the USB BUS.
*/
if (status & ATMEGA_UDINT_EORSMI) {
if (status & ATMEGA_UDINT_WAKEUPI) {
DPRINTFN(5, "resume interrupt\n");
@ -700,7 +700,7 @@ atmegadci_interrupt(struct atmegadci_softc *sc)
/* disable suspend interrupt */
ATMEGA_WRITE_1(sc, ATMEGA_UDIEN,
ATMEGA_UDINT_EORSMI |
ATMEGA_UDINT_WAKEUPE |
ATMEGA_UDINT_EORSTE);
/* complete root HUB interrupt endpoint */
@ -1152,13 +1152,12 @@ atmegadci_clear_stall_sub(struct atmegadci_softc *sc, uint8_t ep_no,
ATMEGA_UECONX_STALLRQC);
do {
temp = 0;
if (ep_type == UE_BULK) {
temp |= ATMEGA_UECFG0X_EPTYPE2;
temp = ATMEGA_UECFG0X_EPTYPE2;
} else if (ep_type == UE_INTERRUPT) {
temp |= ATMEGA_UECFG0X_EPTYPE3;
temp = ATMEGA_UECFG0X_EPTYPE3;
} else {
temp |= ATMEGA_UECFG0X_EPTYPE1;
temp = ATMEGA_UECFG0X_EPTYPE1;
}
if (ep_dir & UE_DIR_IN) {
temp |= ATMEGA_UECFG0X_EPDIR;
@ -1217,13 +1216,28 @@ atmegadci_init(struct atmegadci_softc *sc)
sc->sc_bus.methods = &atmegadci_bus_methods;
USB_BUS_LOCK(&sc->sc_bus);
#if 0
/* XXX TODO - currently done by boot strap */
/* make sure USB is enabled */
ATMEGA_WRITE_1(sc, ATMEGA_USBCON,
ATMEGA_USBCON_USBE |
ATMEGA_USBCON_FRZCLK);
/* enable USB PAD regulator */
ATMEGA_WRITE_1(sc, ATMEGA_UHWCON,
ATMEGA_UHWCON_UVREGE | ATMEGA_UHWCON_UIMOD);
#endif
ATMEGA_UHWCON_UVREGE |
ATMEGA_UHWCON_UIMOD);
/* the following register sets up the USB PLL, assuming 16MHz X-tal */
ATMEGA_WRITE_1(sc, 0x49 /* PLLCSR */, 0x14 | 0x02);
/* wait for PLL to lock */
for (n = 0; n != 20; n++) {
if (ATMEGA_READ_1(sc, 0x49) & 0x01)
break;
/* wait a little bit for PLL to start */
usb2_pause_mtx(&sc->sc_bus.bus_mtx, hz / 100);
}
/* make sure USB is enabled */
ATMEGA_WRITE_1(sc, ATMEGA_USBCON,
ATMEGA_USBCON_USBE |
@ -1847,6 +1861,11 @@ atmegadci_roothub_exec(struct usb2_device *udev,
/* clear connect change flag */
sc->sc_flags.change_connect = 0;
if (!sc->sc_flags.status_bus_reset) {
/* we are not connected */
break;
}
/* configure the control endpoint */
/* select endpoint number */

16
sys/dev/usb/controller/atmegadci.h
View File

@ -34,6 +34,10 @@
#define ATMEGA_MAX_DEVICES (USB_MIN_DEVICES + 1)
#define ATMEGA_OTGTCON 0xF9
#define ATMEGA_OTGTCON_VALUE(x) ((x) << 0)
#define ATMEGA_OTGTCON_PAGE(x) ((x) << 5)
#define ATMEGA_UEINT 0xF4
#define ATMEGA_UEINT_MASK(n) (1 << (n)) /* endpoint interrupt mask */
@ -136,8 +140,19 @@
#define ATMEGA_UDCON_LSM (1 << 2)
#define ATMEGA_UDCON_RSTCPU (1 << 3)
#define ATMEGA_OTGINT 0xDF
#define ATMEGA_OTGCON 0xDD
#define ATMEGA_OTGCON_VBUSRQC (1 << 0)
#define ATMEGA_OTGCON_VBUSREQ (1 << 1)
#define ATMEGA_OTGCON_VBUSHWC (1 << 2)
#define ATMEGA_OTGCON_SRPSEL (1 << 3)
#define ATMEGA_OTGCON_SRPREQ (1 << 4)
#define ATMEGA_OTGCON_HNPREQ (1 << 5)
#define ATMEGA_USBINT 0xDA
#define ATMEGA_USBINT_VBUSTI (1 << 0) /* USB VBUS interrupt */
#define ATMEGA_USBINT_IDI (1 << 1) /* USB ID interrupt */
#define ATMEGA_USBSTA 0xD9
#define ATMEGA_USBSTA_VBUS (1 << 0)
@ -145,6 +160,7 @@
#define ATMEGA_USBCON 0xD8
#define ATMEGA_USBCON_VBUSTE (1 << 0)
#define ATMEGA_USBCON_IDE (1 << 1)
#define ATMEGA_USBCON_OTGPADE (1 << 4)
#define ATMEGA_USBCON_FRZCLK (1 << 5)
#define ATMEGA_USBCON_USBE (1 << 7)