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sfxge(4): support FEC mode settings

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Medford2 controllers support control and reporting of
FEC modes for 25G and higher links. See SF-109306-TC
for suggested usage in client code.

Submitted by:   Andy Moreton <amoreton at solarflare.com>
Sponsored by:   Solarflare Communications, Inc.
Differential Revision:  https://reviews.freebsd.org/D18197
This commit is contained in:
arybchik 2018-11-28 09:22:42 +00:00
parent 251112a395
commit 128c65e1b7
2 changed files with 47 additions and 0 deletions
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41
sys/dev/sfxge/common/ef10_phy.c
View File

@ -61,6 +61,12 @@ mcdi_phy_decode_cap(
CHECK_CAP(ASYM);
CHECK_CAP(AN);
CHECK_CAP(DDM);
CHECK_CAP(BASER_FEC);
CHECK_CAP(BASER_FEC_REQUESTED);
CHECK_CAP(RS_FEC);
CHECK_CAP(RS_FEC_REQUESTED);
CHECK_CAP(25G_BASER_FEC);
CHECK_CAP(25G_BASER_FEC_REQUESTED);
#undef CHECK_CAP
mask = 0;
@ -94,6 +100,22 @@ mcdi_phy_decode_cap(
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
mask |= (1 << EFX_PHY_CAP_AN);
/* FEC caps (supported on Medford2 and later) */
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN))
mask |= (1 << EFX_PHY_CAP_BASER_FEC);
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN))
mask |= (1 << EFX_PHY_CAP_BASER_FEC_REQUESTED);
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_RS_FEC_LBN))
mask |= (1 << EFX_PHY_CAP_RS_FEC);
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN))
mask |= (1 << EFX_PHY_CAP_RS_FEC_REQUESTED);
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN))
mask |= (1 << EFX_PHY_CAP_25G_BASER_FEC);
if (mcdi_cap & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN))
mask |= (1 << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED);
*maskp = mask;
}
@ -350,6 +372,25 @@ ef10_phy_reconfigure(
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_100000FDX, (cap_mask >> EFX_PHY_CAP_100000FDX) & 0x1);
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_BASER_FEC, (cap_mask >> EFX_PHY_CAP_BASER_FEC) & 0x1);
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_BASER_FEC_REQUESTED,
(cap_mask >> EFX_PHY_CAP_BASER_FEC_REQUESTED) & 0x1);
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_RS_FEC, (cap_mask >> EFX_PHY_CAP_RS_FEC) & 0x1);
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_RS_FEC_REQUESTED,
(cap_mask >> EFX_PHY_CAP_RS_FEC_REQUESTED) & 0x1);
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_25G_BASER_FEC,
(cap_mask >> EFX_PHY_CAP_25G_BASER_FEC) & 0x1);
MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
PHY_CAP_25G_BASER_FEC_REQUESTED,
(cap_mask >> EFX_PHY_CAP_25G_BASER_FEC_REQUESTED) & 0x1);
#if EFSYS_OPT_LOOPBACK
MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
epp->ep_loopback_type);

6
sys/dev/sfxge/common/efx.h
View File

@ -904,6 +904,12 @@ typedef enum efx_phy_cap_type_e {
EFX_PHY_CAP_100000FDX,
EFX_PHY_CAP_25000FDX,
EFX_PHY_CAP_50000FDX,
EFX_PHY_CAP_BASER_FEC,
EFX_PHY_CAP_BASER_FEC_REQUESTED,
EFX_PHY_CAP_RS_FEC,
EFX_PHY_CAP_RS_FEC_REQUESTED,
EFX_PHY_CAP_25G_BASER_FEC,
EFX_PHY_CAP_25G_BASER_FEC_REQUESTED,
EFX_PHY_CAP_NTYPES
} efx_phy_cap_type_t;