Fix typos, use American English spellings.
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@ -79,7 +79,7 @@ In other words, the counter will increment only once whenever a given
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condition becomes true, irrespective of the number of clocks during
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which the condition remains true.
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.It Li inv
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Invert the sense of comparision when the
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Invert the sense of comparison when the
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.Dq Li count
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qualifier is present, making the counter to increment when the
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number of events per cycle is less than the value specified by
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@ -205,7 +205,7 @@ Count all retired branches (conditional, unconditional, exceptions
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and interrupts).
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.It Li k7-retired-branches-mispredicted
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.Pq Event C3H
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Count all misprediced retired branches.
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Count all mispredicted retired branches.
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.It Li k7-retired-far-control-transfers
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.Pq Event C6H
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Count retired far control transfers.
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@ -82,7 +82,7 @@ In other words, the counter will increment only once whenever a given
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condition becomes true, irrespective of the number of clocks during
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which the condition remains true.
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.It Li inv
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Invert the sense of comparision when the
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Invert the sense of comparison when the
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.Dq Li count
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qualifier is present, making the counter to increment when the
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number of events per cycle is less than the value specified by
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@ -173,7 +173,7 @@ Count TLB reloads.
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The default is to count all types of requests.
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.It Li k8-dc-access
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.Pq Event 40H
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Count data cache accesses including microcode scratchpad accesses.
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Count data cache accesses including microcode scratch pad accesses.
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.It Li k8-dc-copyback Op Li ,mask= Ns Ar qualifier
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.Pq Event 44H
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Count data cache copyback operations.
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@ -121,7 +121,7 @@ See
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below for more information.
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.It Li edge
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Configure the counter to count false to true transitions of the threshold
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comparision output.
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comparison output.
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This qualifier only takes effect if a threshold qualifier has also been
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specified.
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.It Li complement
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@ -547,7 +547,7 @@ Count cycles when the processor is active.
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.It Li p4-instr-retired Op Li ,mask= Ns Ar flags
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.Pq "TS event"
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Count instructions retired during a clock cycle.
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Qualifer
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Qualifier
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.Ar flags
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comprises of the following strings separated by
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.Ql +
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@ -589,7 +589,7 @@ Count read entries.
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.It Li all-write
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Count write entries.
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.It Li mem-uc
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Count entries accessing uncacheable memory.
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Count entries accessing un-cacheable memory.
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.It Li mem-wc
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Count entries accessing write-combining memory.
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.It Li mem-wt
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@ -620,7 +620,7 @@ The default is 0.
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The
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.Dq Li edge
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qualifier should not be used when counting cycles with this event.
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The exact behaviour of this event depends on the processor revision.
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The exact behavior of this event depends on the processor revision.
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.It Li p4-ioq-allocation Xo
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.Op Li ,mask= Ns Ar qualifier
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.Op Li ,busreqtype= Ns Ar req-type
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@ -644,7 +644,7 @@ Count read entries.
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.It Li all-write
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Count write entries.
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.It Li mem-uc
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Count entries accessing uncacheable memory.
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Count entries accessing un-cacheable memory.
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.It Li mem-wc
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Count entries accessing write-combining memory.
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.It Li mem-wt
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@ -676,10 +676,10 @@ The
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.Dq Li edge
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qualifier is normally used with this event to prevent multiple
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counting.
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The exact behaviour of this event depends on the processor revision.
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The exact behavior of this event depends on the processor revision.
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.It Li p4-itlb-reference Op mask= Ns Ar qualifier
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.Pq "TS event"
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Count translations using the intruction translation look-aside
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Count translations using the instruction translation look-aside
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buffer.
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The
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.Ar qualifier
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@ -693,7 +693,7 @@ Count ITLB hits.
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.It Li miss
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Count ITLB misses.
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.It Li hit-uc
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Count uncacheable ITLB hits.
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Count un-cacheable ITLB hits.
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.El
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.Pp
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If no
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@ -730,7 +730,7 @@ Count non-bogus retired branch instructions.
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.It Li p4-machine-clear Op Li ,mask= Ns Ar flags
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.Pq "TS event"
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Count the number of pipeline clears seen by the processor.
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Qualifer
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Qualifier
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.Ar flags
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is a list of the following strings separated by
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.Ql +
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@ -753,7 +753,7 @@ The default qualifier is
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.Dq Li clear .
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.It Li p4-memory-cancel Op Li ,mask= Ns Ar event-list
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.Pq "TS event"
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Count the cancelling of various kinds of requests in the data cache
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Count the canceling of various kinds of requests in the data cache
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address control unit of the CPU.
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The qualifier
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.Ar event-list
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@ -773,8 +773,8 @@ If
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is not specified, then the default is to count both kinds of events.
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.It Li p4-memory-complete Op Li ,mask= Ns Ar event-list
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.Pq "TS event"
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Count the completion of load split, store split, uncacheable split and
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uncacheable load operations selected by qualifier
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Count the completion of load split, store split, un-cacheable split and
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un-cacheable load operations selected by qualifier
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.Ar event-list .
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The qualifier
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.Ar event-list
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@ -784,7 +784,7 @@ separated list of the following flags:
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.Pp
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.Bl -tag -width indent -compact
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.It Li lsc
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Count load splits completed, excluding loads from uncacheable or
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Count load splits completed, excluding loads from un-cacheable or
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write-combining areas.
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.It Li ssc
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Count any split stores completed.
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@ -1065,7 +1065,7 @@ The default qualifier counts all the above kinds of uops.
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.Pq "TS event"
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This event is used in conjunction with the front-end at-retirement
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mechanism to tag load and store uops.
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Qualifer
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Qualifier
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.Ar flags
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comprises the following strings separated by
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.Ql +
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@ -1112,7 +1112,7 @@ WC buffer evictions due to any cause.
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WC buffer evictions due to no WC buffer being available.
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.El
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.Pp
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The default qualifer counts both kinds of evictions.
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The default qualifier counts both kinds of evictions.
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.It Li p4-x87-assist Op Li ,mask= Ns Ar flags
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.Pq "TS event"
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Count the retirement of x87 instructions that required special
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@ -89,13 +89,13 @@ Configure the PMC to increment only if the number of configured
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events measured in a cycle is greater than or equal to
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.Ar value .
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.It Li edge
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Configure the PMC to count the number of deasserted to asserted
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Configure the PMC to count the number of de-asserted to asserted
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transitions of the conditions expressed by the other qualifiers.
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If specified, the counter will increment only once whenever a
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condition becomes true, irrespective of the number of clocks during
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which the condition remains true.
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.It Li inv
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Invert the sense of comparision when the
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Invert the sense of comparison when the
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.Dq Li cmask
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qualifier is present, making the counter increment when the number of
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events per cycle is less than the value specified by the
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@ -584,7 +584,7 @@ Count SSE2 scalar-double instructions.
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.El
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.Pp
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The default is to count SSE packed-single instructions.
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.It Li p6-emon-sse-sse2-inst-retired Op Li ,umask= Ns Ar qualifer
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.It Li p6-emon-sse-sse2-inst-retired Op Li ,umask= Ns Ar qualifier
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.Pq Event D8H , Tn "Pentium M"
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Count the number of SSE instructions retired.
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An additional qualifier can be specified, and can be one of the
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