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o lsi64854_enet_intr():

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- Like lsi64854_scsi_intr() return -1 in case there was a DMA error so
    the caller can distinguish it from a normal interrupt and leave the
    reset of the DMA engine to the caller so we don't kill any state there.
  - Move the static 'dodrain' flag to struct lsi64854_softc as there can
    be more than one LSI64854 used for a LANCE in a system and reset it
    again once draining the E-cache is done so we don't keep draining the
    cache with every interrupt.
  - Remove calling sc->sc_intrchain(), we will call lsi64854_enet_intr()
    via sc->intr() in the interrupt handler of the LANCE driver and not
    use it in chained mode.

o lsi64854_pp_intr():
  - Like lsi64854_scsi_intr() return -1 in case there was a DMA error so
    the caller can distinguish it from a normal interrupt.

o Remove the no longer used sc_intrchain* from struct lsi64854_softc.

o Make lsi64854_reset(), lsi64854_setup*() and lsi64854_*_intr() static
  to lsi64854.c as we do and will only call them via the respective
  function pointers in struct lsi64854_softc.

o While here fix style(9) bugs (variable definition inside a nested scope).
This commit is contained in:
marius 2006-01-31 12:50:02 +00:00
parent 9cd2981517
commit 1434ed8e8b
2 changed files with 31 additions and 32 deletions
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56
sys/sparc64/sbus/lsi64854.c
View File

@ -86,12 +86,6 @@ __FBSDID("$FreeBSD$");
#include <dev/esp/ncr53c9xreg.h> #include <dev/esp/ncr53c9xreg.h>
#include <dev/esp/ncr53c9xvar.h> #include <dev/esp/ncr53c9xvar.h>
void lsi64854_reset(struct lsi64854_softc *);
int lsi64854_setup(struct lsi64854_softc *, caddr_t *, size_t *, int,
size_t *);
int lsi64854_setup_pp(struct lsi64854_softc *, caddr_t *, size_t *, int,
size_t *);
#ifdef DEBUG #ifdef DEBUG
#define LDB_SCSI 1 #define LDB_SCSI 1
#define LDB_ENET 2 #define LDB_ENET 2
@ -105,6 +99,16 @@ int lsi64854debug = 0;
#define MAX_DMA_SZ (16*1024*1024) #define MAX_DMA_SZ (16*1024*1024)
static void lsi64854_reset(struct lsi64854_softc *);
static void lsi64854_map_scsi(void *, bus_dma_segment_t *, int, int);
static int lsi64854_setup(struct lsi64854_softc *, caddr_t *, size_t *,
int, size_t *);
static int lsi64854_scsi_intr(void *);
static int lsi64854_enet_intr(void *);
static int lsi64854_setup_pp(struct lsi64854_softc *, caddr_t *, size_t *,
int, size_t *);
static int lsi64854_pp_intr(void *);
/* /*
* Finish attaching this DMA device. * Finish attaching this DMA device.
* Front-end must fill in these fields: * Front-end must fill in these fields:
@ -129,6 +133,7 @@ lsi64854_attach(struct lsi64854_softc *sc)
sc->intr = lsi64854_enet_intr; sc->intr = lsi64854_enet_intr;
break; break;
case L64854_CHANNEL_PP: case L64854_CHANNEL_PP:
sc->intr = lsi64854_pp_intr;
sc->setup = lsi64854_setup_pp; sc->setup = lsi64854_setup_pp;
break; break;
default: default:
@ -264,7 +269,7 @@ lsi64854_detach(struct lsi64854_softc *sc)
L64854_SCSR(sc,csr); \ L64854_SCSR(sc,csr); \
} while(0) } while(0)
void static void
lsi64854_reset(struct lsi64854_softc *sc) lsi64854_reset(struct lsi64854_softc *sc)
{ {
uint32_t csr; uint32_t csr;
@ -355,10 +360,11 @@ lsi64854_map_scsi(void *arg, bus_dma_segment_t *segs, int nseg, int error)
/* /*
* setup a DMA transfer * setup a DMA transfer
*/ */
int static int
lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len, lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
int datain, size_t *dmasize) int datain, size_t *dmasize)
{ {
long bcnt;
uint32_t csr; uint32_t csr;
DMA_FLUSH(sc, 0); DMA_FLUSH(sc, 0);
@ -399,9 +405,8 @@ lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
if (sc->sc_rev == DMAREV_ESC) { if (sc->sc_rev == DMAREV_ESC) {
/* DMA ESC chip bug work-around */ /* DMA ESC chip bug work-around */
long bcnt = sc->sc_dmasize; bcnt = sc->sc_dmasize;
long eaddr = bcnt + (long)*sc->sc_dmaaddr; if (((bcnt + (long)*sc->sc_dmaaddr) & PAGE_MASK_8K) != 0)
if ((eaddr & PAGE_MASK_8K) != 0)
bcnt = roundup(bcnt, PAGE_SIZE_8K); bcnt = roundup(bcnt, PAGE_SIZE_8K);
bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_CNT, bus_space_write_4(sc->sc_regt, sc->sc_regh, L64854_REG_CNT,
bcnt); bcnt);
@ -431,7 +436,7 @@ lsi64854_setup(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
* *
* return 1 if it was a DMA continue. * return 1 if it was a DMA continue.
*/ */
int static int
lsi64854_scsi_intr(void *arg) lsi64854_scsi_intr(void *arg)
{ {
struct lsi64854_softc *sc = arg; struct lsi64854_softc *sc = arg;
@ -551,13 +556,12 @@ lsi64854_scsi_intr(void *arg)
/* /*
* Pseudo (chained) interrupt to le driver to handle DMA errors. * Pseudo (chained) interrupt to le driver to handle DMA errors.
*/ */
int static int
lsi64854_enet_intr(void *arg) lsi64854_enet_intr(void *arg)
{ {
struct lsi64854_softc *sc = arg; struct lsi64854_softc *sc = arg;
uint32_t csr; uint32_t csr;
static int dodrain = 0; int i, rv;
int rv;
csr = L64854_GCSR(sc); csr = L64854_GCSR(sc);
@ -570,21 +574,21 @@ lsi64854_enet_intr(void *arg)
/* Invalidate the queue; SLAVE_ERR bit is write-to-clear */ /* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
csr |= E_INVALIDATE|E_SLAVE_ERR; csr |= E_INVALIDATE|E_SLAVE_ERR;
L64854_SCSR(sc, csr); L64854_SCSR(sc, csr);
DMA_RESET(sc); /* Will be drained with the LE_C0_IDON interrupt. */
dodrain = 1; sc->sc_dodrain = 1;
return (1); return (-1);
} }
if (dodrain) { /* XXX - is this necessary with D_DSBL_WRINVAL on? */ /* XXX - is this necessary with E_DSBL_WR_INVAL on? */
int i = 10; if (sc->sc_dodrain) {
i = 10;
csr |= E_DRAIN; csr |= E_DRAIN;
L64854_SCSR(sc, csr); L64854_SCSR(sc, csr);
while (i-- > 0 && (L64854_GCSR(sc) & D_DRAINING)) while (i-- > 0 && (L64854_GCSR(sc) & E_DRAINING))
DELAY(1); DELAY(1);
sc->sc_dodrain = 0;
} }
(*sc->sc_intrchain)(sc->sc_intrchainarg);
return (rv); return (rv);
} }
@ -610,7 +614,7 @@ lsi64854_map_pp(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
/* /*
* setup a DMA transfer * setup a DMA transfer
*/ */
int static int
lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len, lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
int datain, size_t *dmasize) int datain, size_t *dmasize)
{ {
@ -666,7 +670,7 @@ lsi64854_setup_pp(struct lsi64854_softc *sc, caddr_t *addr, size_t *len,
/* /*
* Parallel port DMA interrupt. * Parallel port DMA interrupt.
*/ */
int static int
lsi64854_pp_intr(void *arg) lsi64854_pp_intr(void *arg)
{ {
struct lsi64854_softc *sc = arg; struct lsi64854_softc *sc = arg;
@ -688,7 +692,7 @@ lsi64854_pp_intr(void *arg)
/* Invalidate the queue; SLAVE_ERR bit is write-to-clear */ /* Invalidate the queue; SLAVE_ERR bit is write-to-clear */
csr |= P_INVALIDATE|P_SLAVE_ERR; csr |= P_INVALIDATE|P_SLAVE_ERR;
L64854_SCSR(sc, csr); L64854_SCSR(sc, csr);
return (1); return (-1);
} }
ret = (csr & P_INT_PEND) != 0; ret = (csr & P_INT_PEND) != 0;

7
sys/sparc64/sbus/lsi64854var.h
View File

@ -69,10 +69,8 @@ struct lsi64854_softc {
int, size_t *); /* DMA setup */ int, size_t *); /* DMA setup */
int (*intr)(void *); /* interrupt handler */ int (*intr)(void *); /* interrupt handler */
driver_intr_t *sc_intrchain; /* next handler in intr chain */
void *sc_intrchainarg; /* arg for next intr handler */
u_int sc_dmactl; u_int sc_dmactl;
int sc_dodrain;
}; };
#define L64854_GCSR(sc) \ #define L64854_GCSR(sc) \
@ -109,6 +107,3 @@ struct lsi64854_softc {
int lsi64854_attach(struct lsi64854_softc *); int lsi64854_attach(struct lsi64854_softc *);
int lsi64854_detach(struct lsi64854_softc *); int lsi64854_detach(struct lsi64854_softc *);
int lsi64854_scsi_intr(void *);
int lsi64854_enet_intr(void *);
int lsi64854_pp_intr(void *);