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Use pci_get_powerstate()/pci_set_powerstate() which now exists in the

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PCI code. This saves each driver from having to grovel around looking
for the right registers to twiddle.

I should eventually convert the other PCI drivers to do this; for now,
these three are ones which I know need power state handling.
This commit is contained in:
Bill Paul 2000-12-18 21:53:05 +00:00
parent 70d8bdef9d
commit 14a00c6c68
4 changed files with 62 additions and 86 deletions
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40
sys/dev/dc/if_dc.c
View File

@ -1564,38 +1564,30 @@ static int dc_probe(dev)
static void dc_acpi(dev)
device_t dev;
{
u_int32_t r, cptr;
int unit;
unit = device_get_unit(dev);
/* Find the location of the capabilities block */
cptr = pci_read_config(dev, DC_PCI_CCAP, 4) & 0xFF;
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
u_int32_t iobase, membase, irq;
r = pci_read_config(dev, cptr, 4) & 0xFF;
if (r == 0x01) {
/* Save important PCI config data. */
iobase = pci_read_config(dev, DC_PCI_CFBIO, 4);
membase = pci_read_config(dev, DC_PCI_CFBMA, 4);
irq = pci_read_config(dev, DC_PCI_CFIT, 4);
r = pci_read_config(dev, cptr + 4, 4);
if (r & DC_PSTATE_D3) {
u_int32_t iobase, membase, irq;
/* Reset the power state. */
printf("dc%d: chip is in D%d power mode "
"-- setting to D0\n", unit,
pci_get_powerstate(dev));
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
/* Save important PCI config data. */
iobase = pci_read_config(dev, DC_PCI_CFBIO, 4);
membase = pci_read_config(dev, DC_PCI_CFBMA, 4);
irq = pci_read_config(dev, DC_PCI_CFIT, 4);
/* Reset the power state. */
printf("dc%d: chip is in D%d power mode "
"-- setting to D0\n", unit, r & DC_PSTATE_D3);
r &= 0xFFFFFFFC;
pci_write_config(dev, cptr + 4, r, 4);
/* Restore PCI config data. */
pci_write_config(dev, DC_PCI_CFBIO, iobase, 4);
pci_write_config(dev, DC_PCI_CFBMA, membase, 4);
pci_write_config(dev, DC_PCI_CFIT, irq, 4);
}
/* Restore PCI config data. */
pci_write_config(dev, DC_PCI_CFBIO, iobase, 4);
pci_write_config(dev, DC_PCI_CFBMA, membase, 4);
pci_write_config(dev, DC_PCI_CFIT, irq, 4);
}
return;
}

40
sys/pci/if_dc.c
View File

@ -1564,38 +1564,30 @@ static int dc_probe(dev)
static void dc_acpi(dev)
device_t dev;
{
u_int32_t r, cptr;
int unit;
unit = device_get_unit(dev);
/* Find the location of the capabilities block */
cptr = pci_read_config(dev, DC_PCI_CCAP, 4) & 0xFF;
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
u_int32_t iobase, membase, irq;
r = pci_read_config(dev, cptr, 4) & 0xFF;
if (r == 0x01) {
/* Save important PCI config data. */
iobase = pci_read_config(dev, DC_PCI_CFBIO, 4);
membase = pci_read_config(dev, DC_PCI_CFBMA, 4);
irq = pci_read_config(dev, DC_PCI_CFIT, 4);
r = pci_read_config(dev, cptr + 4, 4);
if (r & DC_PSTATE_D3) {
u_int32_t iobase, membase, irq;
/* Reset the power state. */
printf("dc%d: chip is in D%d power mode "
"-- setting to D0\n", unit,
pci_get_powerstate(dev));
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
/* Save important PCI config data. */
iobase = pci_read_config(dev, DC_PCI_CFBIO, 4);
membase = pci_read_config(dev, DC_PCI_CFBMA, 4);
irq = pci_read_config(dev, DC_PCI_CFIT, 4);
/* Reset the power state. */
printf("dc%d: chip is in D%d power mode "
"-- setting to D0\n", unit, r & DC_PSTATE_D3);
r &= 0xFFFFFFFC;
pci_write_config(dev, cptr + 4, r, 4);
/* Restore PCI config data. */
pci_write_config(dev, DC_PCI_CFBIO, iobase, 4);
pci_write_config(dev, DC_PCI_CFBMA, membase, 4);
pci_write_config(dev, DC_PCI_CFIT, irq, 4);
}
/* Restore PCI config data. */
pci_write_config(dev, DC_PCI_CFBIO, iobase, 4);
pci_write_config(dev, DC_PCI_CFBMA, membase, 4);
pci_write_config(dev, DC_PCI_CFIT, irq, 4);
}
return;
}

34
sys/pci/if_rl.c
View File

@ -809,29 +809,25 @@ static int rl_attach(dev)
* Handle power management nonsense.
*/
command = pci_read_config(dev, RL_PCI_CAPID, 4) & 0x000000FF;
if (command == 0x01) {
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
u_int32_t iobase, membase, irq;
command = pci_read_config(dev, RL_PCI_PWRMGMTCTRL, 4);
if (command & RL_PSTATE_MASK) {
u_int32_t iobase, membase, irq;
/* Save important PCI config data. */
iobase = pci_read_config(dev, RL_PCI_LOIO, 4);
membase = pci_read_config(dev, RL_PCI_LOMEM, 4);
irq = pci_read_config(dev, RL_PCI_INTLINE, 4);
/* Save important PCI config data. */
iobase = pci_read_config(dev, RL_PCI_LOIO, 4);
membase = pci_read_config(dev, RL_PCI_LOMEM, 4);
irq = pci_read_config(dev, RL_PCI_INTLINE, 4);
/* Reset the power state. */
printf("rl%d: chip is is in D%d power mode "
"-- setting to D0\n", unit,
pci_get_powerstate(dev));
/* Reset the power state. */
printf("rl%d: chip is is in D%d power mode "
"-- setting to D0\n", unit, command & RL_PSTATE_MASK);
command &= 0xFFFFFFFC;
pci_write_config(dev, RL_PCI_PWRMGMTCTRL, command, 4);
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
/* Restore PCI config data. */
pci_write_config(dev, RL_PCI_LOIO, iobase, 4);
pci_write_config(dev, RL_PCI_LOMEM, membase, 4);
pci_write_config(dev, RL_PCI_INTLINE, irq, 4);
}
/* Restore PCI config data. */
pci_write_config(dev, RL_PCI_LOIO, iobase, 4);
pci_write_config(dev, RL_PCI_LOMEM, membase, 4);
pci_write_config(dev, RL_PCI_INTLINE, irq, 4);
}
/*

34
sys/pci/if_xl.c
View File

@ -1282,29 +1282,25 @@ static int xl_attach(dev)
* back in the D0 state, then restore the PCI config ourselves.
*/
command = pci_read_config(dev, XL_PCI_CAPID, 4) & 0x000000FF;
if (command == 0x01) {
if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
u_int32_t iobase, membase, irq;
command = pci_read_config(dev, XL_PCI_PWRMGMTCTRL, 4);
if (command & XL_PSTATE_MASK) {
u_int32_t iobase, membase, irq;
/* Save important PCI config data. */
iobase = pci_read_config(dev, XL_PCI_LOIO, 4);
membase = pci_read_config(dev, XL_PCI_LOMEM, 4);
irq = pci_read_config(dev, XL_PCI_INTLINE, 4);
/* Save important PCI config data. */
iobase = pci_read_config(dev, XL_PCI_LOIO, 4);
membase = pci_read_config(dev, XL_PCI_LOMEM, 4);
irq = pci_read_config(dev, XL_PCI_INTLINE, 4);
/* Reset the power state. */
printf("xl%d: chip is in D%d power mode "
"-- setting to D0\n", unit,
pci_get_powerstate(dev));
/* Reset the power state. */
printf("xl%d: chip is in D%d power mode "
"-- setting to D0\n", unit, command & XL_PSTATE_MASK);
command &= 0xFFFFFFFC;
pci_write_config(dev, XL_PCI_PWRMGMTCTRL, command, 4);
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
/* Restore PCI config data. */
pci_write_config(dev, XL_PCI_LOIO, iobase, 4);
pci_write_config(dev, XL_PCI_LOMEM, membase, 4);
pci_write_config(dev, XL_PCI_INTLINE, irq, 4);
}
/* Restore PCI config data. */
pci_write_config(dev, XL_PCI_LOIO, iobase, 4);
pci_write_config(dev, XL_PCI_LOMEM, membase, 4);
pci_write_config(dev, XL_PCI_INTLINE, irq, 4);
}
/*