arcmsr: clean up empty lines in .c and .h files
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dedcfeb6c6
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1618c554b0
@ -263,7 +263,7 @@ static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int fla
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{
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int unit = dev2unit(dev);
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struct AdapterControlBlock *acb = devclass_get_softc(arcmsr_devclass, unit);
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if (acb == NULL) {
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return ENXIO;
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}
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@ -451,7 +451,7 @@ static u_int8_t arcmsr_hbe_wait_msgint_ready(struct AdapterControlBlock *acb)
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{
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u_int32_t Index, read_doorbell;
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u_int8_t Retries = 0x00;
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do {
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for(Index=0; Index < 100; Index++) {
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read_doorbell = CHIP_REG_READ32(HBE_MessageUnit, 0, iobound_doorbell);
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@ -542,7 +542,7 @@ static void arcmsr_flush_hbd_cache(struct AdapterControlBlock *acb)
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static void arcmsr_flush_hbe_cache(struct AdapterControlBlock *acb)
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{
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int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
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CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_FLUSH_CACHE);
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acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
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CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell);
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@ -934,7 +934,6 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
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}
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break;
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case ACB_ADAPTER_TYPE_C: {
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while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
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flag_srb = CHIP_REG_READ32(HBC_MessageUnit, 0, outbound_queueport_low);
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error = (flag_srb & ARCMSR_SRBREPLY_FLAG_ERROR_MODE1) ? TRUE : FALSE;
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@ -1207,7 +1206,7 @@ static struct QBUFFER *arcmsr_get_iop_rqbuffer( struct AdapterControlBlock *acb)
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break;
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case ACB_ADAPTER_TYPE_E: {
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struct HBE_MessageUnit *phbcmu = (struct HBE_MessageUnit *)acb->pmu;
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qbuffer = (struct QBUFFER *)&phbcmu->message_rbuffer;
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}
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break;
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@ -1249,7 +1248,7 @@ static struct QBUFFER *arcmsr_get_iop_wqbuffer( struct AdapterControlBlock *acb)
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break;
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case ACB_ADAPTER_TYPE_E: {
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struct HBE_MessageUnit *phbcmu = (struct HBE_MessageUnit *)acb->pmu;
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qbuffer = (struct QBUFFER *)&phbcmu->message_wbuffer;
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}
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break;
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@ -1462,7 +1461,6 @@ static void arcmsr_poll(struct cam_sim *psim)
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*/
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static u_int32_t arcmsr_Read_iop_rqbuffer_data_D(struct AdapterControlBlock *acb,
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struct QBUFFER *prbuffer) {
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u_int8_t *pQbuffer;
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u_int8_t *buf1 = NULL;
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u_int32_t *iop_data, *buf2 = NULL;
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@ -1507,7 +1505,6 @@ static u_int32_t arcmsr_Read_iop_rqbuffer_data_D(struct AdapterControlBlock *acb
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*/
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static u_int32_t arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
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struct QBUFFER *prbuffer) {
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u_int8_t *pQbuffer;
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u_int8_t *iop_data;
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u_int32_t iop_len;
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@ -1689,7 +1686,6 @@ static void arcmsr_rescan_lun(struct AdapterControlBlock *acb, int target, int l
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xpt_action(ccb);
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}
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static void arcmsr_abort_dr_ccbs(struct AdapterControlBlock *acb, int target, int lun)
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{
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struct CommandControlBlock *srb;
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@ -1965,7 +1961,7 @@ static void arcmsr_hbd_doorbell_isr(struct AdapterControlBlock *acb)
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static void arcmsr_hbe_doorbell_isr(struct AdapterControlBlock *acb)
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{
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u_int32_t doorbell_status, in_doorbell;
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/*
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*******************************************************************
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** Maybe here we need to check wrqbuffer_lock is lock or not
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@ -2136,7 +2132,7 @@ static void arcmsr_hbe_postqueue_isr(struct AdapterControlBlock *acb)
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u_int16_t error;
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uint32_t doneq_index;
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uint16_t cmdSMID;
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/*
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*****************************************************************************
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** areca cdb command done
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@ -2988,7 +2984,7 @@ static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
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case INQUIRY: {
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unsigned char inqdata[36];
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char *buffer = pccb->csio.data_ptr;
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inqdata[0] = T_PROCESSOR; /* Periph Qualifier & Periph Dev Type */
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inqdata[1] = 0; /* rem media bit & Dev Type Modifier */
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inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */
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@ -3110,7 +3106,7 @@ static void arcmsr_action(struct cam_sim *psim, union ccb *pccb)
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}
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case XPT_ABORT: {
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union ccb *pabort_ccb;
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pabort_ccb = pccb->cab.abort_ccb;
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switch (pabort_ccb->ccb_h.func_code) {
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case XPT_ACCEPT_TARGET_IO:
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@ -3548,7 +3544,7 @@ static void arcmsr_polling_hbe_srbdone(struct AdapterControlBlock *acb, struct C
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struct CommandControlBlock *srb;
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u_int32_t poll_srb_done=0, poll_count=0, doneq_index;
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u_int16_t error, cmdSMID;
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polling_ccb_retry:
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poll_count++;
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bus_dmamap_sync(acb->srb_dmat, acb->srb_dmamap, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
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@ -3835,14 +3831,14 @@ static void arcmsr_get_hbe_config(struct AdapterControlBlock *acb)
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size_t iop_firm_version = offsetof(struct HBE_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_VERS_OFFSET]); /*firm_version,17,68-83*/
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size_t iop_device_map = offsetof(struct HBE_MessageUnit,msgcode_rwbuffer[ARCMSR_FW_DEVMAP_OFFSET]);
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int i;
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CHIP_REG_WRITE32(HBE_MessageUnit, 0, inbound_msgaddr0, ARCMSR_INBOUND_MESG0_GET_CONFIG);
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acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
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CHIP_REG_WRITE32(HBE_MessageUnit, 0, iobound_doorbell, acb->out_doorbell);
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if(!arcmsr_hbe_wait_msgint_ready(acb)) {
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printf("arcmsr%d: wait 'get adapter firmware miscellaneous data' timeout \n", acb->pci_unit);
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}
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i = 0;
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while(i < 8) {
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*acb_firm_model = bus_space_read_1(acb->btag[0], acb->bhandle[0], iop_firm_model+i);
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@ -1128,15 +1128,15 @@ struct ARCMSR_CDB {
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u_int8_t TargetID; /* 01h should be 0--15 */
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u_int8_t LUN; /* 02h should be 0--7 */
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u_int8_t Function; /* 03h should be 1 */
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u_int8_t CdbLength; /* 04h not used now */
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u_int8_t sgcount; /* 05h */
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u_int8_t Flags; /* 06h */
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u_int8_t msgPages; /* 07h */
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u_int32_t Context; /* 08h Address of this request */
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u_int32_t DataLength; /* 0ch not used now */
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u_int8_t Cdb[16]; /* 10h SCSI CDB */
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/*
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********************************************************
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@ -1145,9 +1145,9 @@ struct ARCMSR_CDB {
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********************************************************
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*/
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u_int8_t DeviceStatus; /* 20h if error */
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u_int8_t SenseData[15]; /* 21h output */
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union {
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struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h Scatter gather address */
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struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h */
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@ -1235,7 +1235,7 @@ struct CommandControlBlock {
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struct AdapterControlBlock {
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u_int32_t adapter_type; /* adapter A,B..... */
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bus_space_tag_t btag[2];
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bus_space_handle_t bhandle[2];
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bus_dma_tag_t parent_dmat;
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@ -1245,12 +1245,12 @@ struct AdapterControlBlock {
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device_t pci_dev;
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struct cdev *ioctl_dev;
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int pci_unit;
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struct resource *sys_res_arcmsr[2];
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struct resource *irqres[ARCMSR_NUM_MSIX_VECTORS];
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void *ih[ARCMSR_NUM_MSIX_VECTORS]; /* interrupt handle */
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int irq_id[ARCMSR_NUM_MSIX_VECTORS];
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/* Hooks into the CAM XPT */
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struct cam_sim *psim;
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struct cam_path *ppath;
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@ -1266,32 +1266,32 @@ struct AdapterControlBlock {
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// unsigned long srb_phyaddr;
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/* Offset is used in making arc cdb physical to virtual calculations */
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u_int32_t outbound_int_enable;
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struct MessageUnit_UNION *pmu; /* message unit ATU inbound base address0 */
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u_int8_t adapter_index;
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u_int8_t irq;
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u_int16_t acb_flags;
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struct CommandControlBlock *psrb_pool[ARCMSR_MAX_FREESRB_NUM]; /* serial srb pointer array */
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struct CommandControlBlock *srbworkingQ[ARCMSR_MAX_FREESRB_NUM]; /* working srb pointer array */
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int32_t workingsrb_doneindex; /* done srb array index */
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int32_t workingsrb_startindex; /* start srb array index */
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int32_t srboutstandingcount;
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u_int8_t rqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for read from 80331 */
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u_int32_t rqbuf_firstindex; /* first of read buffer */
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u_int32_t rqbuf_lastindex; /* last of read buffer */
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u_int8_t wqbuffer[ARCMSR_MAX_QBUFFER]; /* data collection buffer for write to 80331 */
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u_int32_t wqbuf_firstindex; /* first of write buffer */
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u_int32_t wqbuf_lastindex; /* last of write buffer */
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arcmsr_lock_t isr_lock;
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arcmsr_lock_t srb_lock;
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arcmsr_lock_t postDone_lock;
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arcmsr_lock_t qbuffer_lock;
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u_int8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN]; /* id0 ..... id15,lun0...lun7 */
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u_int32_t num_resets;
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u_int32_t num_aborts;
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@ -2500,9 +2500,6 @@ struct SENSE_DATA {
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**************************************************************************
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*/
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/*
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*************************************************************************************************************************************
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** 80331 Address Translation Unit Register Definitions
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@ -3028,8 +3025,6 @@ struct SENSE_DATA {
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***************************************************************************************
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*/
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/*
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***********************************************************************************
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** ATU Interrupt Line Register - ATUILR
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@ -3157,8 +3152,6 @@ struct SENSE_DATA {
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***********************************************************************************
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*/
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/*
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***********************************************************************************
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** Inbound ATU Limit Register 0 - IALR0
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@ -4387,8 +4380,6 @@ struct SENSE_DATA {
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*****************************************************************
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*/
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/*
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**************************************************************************
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** Inbound Read Completions Data Parity Errors
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@ -4447,7 +4438,6 @@ struct SENSE_DATA {
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***************************************************************************
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*/
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/*
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***************************************************************************
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** Inbound Configuration Write Request
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@ -4553,7 +4543,6 @@ struct SENSE_DATA {
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*****************************************************************************
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*/
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/*
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******************************************************************************************************
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** Messaging Unit (MU) of the Intel R 80331 I/O processor (80331)
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