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Fix the ar724x PCI config space register read.

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It was doing incorrect things with masks.  This was fixed in the
AR71xx codebase but it wasn't yet fixed in the AR724x code.

This ended up having config space reads return larger/incorrect values
in some situations.

Tested:

* AR7240

TODO:

* test ar7241, AR7242, and AR934x.
This commit is contained in:
adrian 2014-09-28 05:28:11 +00:00
parent 957dedb1ad
commit 16e362e70a
1 changed files with 6 additions and 4 deletions
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10
sys/mips/atheros/ar724x_pci.c
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@ -122,8 +122,12 @@ ar724x_pci_read_config(device_t dev, u_int bus, u_int slot, u_int func,
/* Register access is 32-bit aligned */
shift = (reg & 3) * 8;
if (shift)
mask = (1 << shift) - 1;
/* Create a mask based on the width, post-shift */
if (bytes == 2)
mask = 0xffff;
else if (bytes == 1)
mask = 0xff;
else
mask = 0xffffffff;
@ -337,7 +341,6 @@ ar724x_pci_slot_fixup(device_t dev)
return;
}
device_printf(dev, "found EEPROM at 0x%lx on %d.%d.%d\n",
flash_addr, 0, 0, 0);
ar724x_pci_fixup(dev, flash_addr, size);
@ -486,7 +489,6 @@ ar724x_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
}
}
return (rv);
}