Removed the simplelock functions.
Cleaned up the other functions.
This commit is contained in:
fsmp
parent
bbdb1366d3
commit
176a721ba4
@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: apic_ipl.s,v 1.19 1997/07/23 21:18:30 smp Exp smp $
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* $Id: apic_ipl.s,v 1.9 1997/07/23 21:25:31 fsmp Exp $
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*/
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@ -251,9 +251,7 @@ bad_mask: .asciz "bad mask"
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* It sets the associated bit in _apic_imen.
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* It sets the mask bit of the associated IO APIC register.
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*/
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ALIGN_TEXT
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.globl _INTREN
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_INTREN:
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ENTRY(INTREN)
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pushfl /* save state of EI flag */
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cli /* prevent recursion */
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IMASK_LOCK /* enter critical reg */
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@ -285,9 +283,7 @@ _INTREN:
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* It clears the associated bit in _apic_imen.
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* It clears the mask bit of the associated IO APIC register.
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*/
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ALIGN_TEXT
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.globl _INTRDIS
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_INTRDIS:
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ENTRY(INTRDIS)
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pushfl /* save state of EI flag */
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cli /* prevent recursion */
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IMASK_LOCK /* enter critical reg */
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@ -413,7 +409,7 @@ _INTRDIS:
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/*
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* u_int read_io_apic_mask(int apic);
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*/
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.align 2
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ALIGN_TEXT
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read_io_apic_mask:
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ret
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@ -423,14 +419,14 @@ read_io_apic_mask:
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*
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* void set_io_apic_mask(apic, u_int32_t bits);
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*/
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.align 2
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ALIGN_TEXT
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set_io_apic_mask:
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ret
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/*
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* void set_ioapic_maskbit(int apic, int bit);
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*/
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.align 2
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ALIGN_TEXT
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set_ioapic_maskbit:
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ret
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@ -440,14 +436,14 @@ set_ioapic_maskbit:
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*
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* void clr_io_apic_mask(int apic, u_int32_t bits);
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*/
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.align 2
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ALIGN_TEXT
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clr_io_apic_mask:
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ret
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/*
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* void clr_ioapic_maskbit(int apic, int bit);
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*/
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.align 2
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ALIGN_TEXT
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clr_ioapic_maskbit:
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ret
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@ -460,9 +456,7 @@ clr_ioapic_maskbit:
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/*
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* u_int io_apic_write(int apic, int select);
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*/
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.align 2
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.globl _io_apic_read
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_io_apic_read:
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ENTRY(io_apic_read)
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movl 4(%esp), %ecx /* APIC # */
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movl _ioapic(,%ecx,4), %edx /* APIC base register address */
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movl 8(%esp), %eax /* target register index */
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@ -473,9 +467,7 @@ _io_apic_read:
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/*
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* void io_apic_write(int apic, int select, int value);
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*/
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.align 2
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.globl _io_apic_write
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_io_apic_write:
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ENTRY(io_apic_write)
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movl 4(%esp), %ecx /* APIC # */
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movl _ioapic(,%ecx,4), %edx /* APIC base register address */
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movl 8(%esp), %eax /* target register index */
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@ -487,129 +479,6 @@ _io_apic_write:
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/*
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* Send an EOI to the local APIC.
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*/
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.align 2
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.globl _apic_eoi
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_apic_eoi:
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ENTRY(apic_eoi)
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movl $0, _lapic+0xb0
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ret
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/******************************************************************************
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*
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*/
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/*
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* test_and_set(struct simplelock *lkp);
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*/
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.align 2
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.globl _test_and_set
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_test_and_set:
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movl 4(%esp), %eax /* get the address of the lock */
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lock /* do it atomically */
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btsl $0, (%eax) /* set 0th bit, old value in CF */
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setc %al /* previous value into %al */
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movzbl %al, %eax /* return as an int */
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ret
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/******************************************************************************
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*
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*/
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/*
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* The simple-lock routines are the primitives out of which the lock
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* package is built. The machine-dependent code must implement an
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* atomic test_and_set operation that indivisibly sets the simple lock
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* to non-zero and returns its old value. It also assumes that the
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* setting of the lock to zero below is indivisible. Simple locks may
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* only be used for exclusive locks.
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*
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* struct simplelock {
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* int lock_data;
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* };
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*/
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/*
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* void
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* s_lock_init(struct simplelock *lkp)
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* {
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* lkp->lock_data = 0;
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* }
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*/
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.align 2
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.globl _s_lock_init
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_s_lock_init:
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movl 4(%esp), %eax /* get the address of the lock */
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#ifdef ANAL_SIMPLE_LOCK
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xorl %ecx, %ecx /* cheap clear */
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xchgl %ecx, (%eax) /* in case its not 32bit aligned */
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#else
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movl $0, (%eax)
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#endif /* ANAL_SIMPLE_LOCK */
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ret
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/*
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* void
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* s_lock(__volatile struct simplelock *lkp)
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* {
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* while (test_and_set(&lkp->lock_data))
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* continue;
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* }
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*
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* Note:
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* If the acquire fails we do a loop of reads waiting for the lock to
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* become free instead of continually beating on the lock with btsl.
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* The theory here is that the CPU will stay within its cache until
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* a write by the other CPU updates it, instead of continually updating
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* the local cache (and thus causing external bus writes) with repeated
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* writes to the lock.
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*/
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.align 2
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.globl _s_lock
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_s_lock:
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movl 4(%esp), %eax /* get the address of the lock */
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1: lock /* do it atomically */
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btsl $0, (%eax) /* set 0th bit, old value in CF */
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jnc 3f /* it was clear, return */
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2: btl $0, (%eax) /* wait to empty */
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jc 2b /* still set... */
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jmp 1b /* empty again, try once more */
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3: ret
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/*
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* int
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* s_lock_try(__volatile struct simplelock *lkp)
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* {
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* return (!test_and_set(&lkp->lock_data));
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* }
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*/
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.align 2
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.globl _s_lock_try
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_s_lock_try:
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movl 4(%esp), %eax /* get the address of the lock */
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lock /* do it atomically */
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btsl $0, (%eax) /* set 0th bit, old value in CF */
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setnc %al /* 1 if previous value was 0 */
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movzbl %al, %eax /* convert to an int */
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ret
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/*
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* void
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* s_unlock(__volatile struct simplelock *lkp)
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* {
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* lkp->lock_data = 0;
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* }
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*/
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.align 2
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.globl _s_unlock
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_s_unlock:
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movl 4(%esp), %eax /* get the address of the lock */
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#ifdef ANAL_SIMPLE_LOCK
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xorl %ecx, %ecx /* cheap clear */
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xchgl %ecx, (%eax) /* in case its not 32bit aligned */
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#else
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movl $0, (%eax)
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#endif /* ANAL_SIMPLE_LOCK */
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ret
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