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Safe PCI configuration.

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- Clear PCIM_CMD_MWRICEN:
	some chips seem to have problem with write invalidate.
	clearing this bit fixes SBP timeout problem.

Tested by: Michael Reifenberger <Michael.Reifenberger@Plaut.de>

- Set PCIM_CMD_SERRESPEN and PCIM_CMD_PERRESPEN
- Moderate value for latency timer.
This commit is contained in:
simokawa 2003-03-24 03:47:36 +00:00
parent c1f83c0cff
commit 176bfd0826
1 changed files with 6 additions and 2 deletions
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8
sys/dev/firewire/fwohci_pci.c
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@ -154,11 +154,15 @@ fwohci_pci_init(device_t self)
u_int16_t cmd;
cmd = pci_read_config(self, PCIR_COMMAND, 2);
cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
cmd |= PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN |
PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN;
#if 1
cmd &= ~PCIM_CMD_MWRICEN;
#endif
pci_write_config(self, PCIR_COMMAND, cmd, 2);
latency = pci_read_config(self, PCIR_LATTIMER, 1);
#define DEF_LATENCY 250 /* Derived from Max Bulk Transfer size 512 Bytes*/
#define DEF_LATENCY 0x20
if( latency < DEF_LATENCY ) {
latency = DEF_LATENCY;
device_printf(self, "PCI bus latency was changing to");