Introduce MII_ADDR_BASE option on ARM, which allows to override the default
per platform requirements. Notes: - Only used by mge(4) at the moment. - This is very simplified approach and should be replaced by some long-term solution for managing the board/platform configuration (among others the MAC-PHY binding info). Submitted by: Michal Hajduk Obtained from: Semihalf
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@ -24,6 +24,7 @@ KERNVIRTADDR opt_global.h
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LOADERRAMADDR opt_global.h
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PHYSADDR opt_global.h
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PHYSMEM_SIZE opt_global.h
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MII_ADDR_BASE opt_global.h
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SKYEYE_WORKAROUNDS opt_global.h
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SOC_MV_DISCOVERY opt_global.h
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SOC_MV_KIRKWOOD opt_global.h
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@ -69,7 +69,9 @@ __FBSDID("$FreeBSD$");
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#define MV_PHY_ADDR_BASE 8
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#ifndef MII_ADDR_BASE
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#define MII_ADDR_BASE 8
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#endif
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#include <dev/mge/if_mgevar.h>
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#include <arm/mv/mvreg.h>
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@ -1264,14 +1266,15 @@ mge_miibus_readreg(device_t dev, int phy, int reg)
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/*
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* We assume static PHY address <=> device unit mapping:
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* PHY Address = MV_PHY_ADDR_BASE + devce unit.
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* PHY Address = MII_ADDR_BASE + devce unit.
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* This is true for most Marvell boards.
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*
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* Code below grants proper PHY detection on each device
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* unit.
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*/
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if ((MV_PHY_ADDR_BASE + device_get_unit(dev)) != phy)
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if ((MII_ADDR_BASE + device_get_unit(dev)) != phy)
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return (0);
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MGE_WRITE(sc_mge0, MGE_REG_SMI, 0x1fffffff &
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@ -1292,7 +1295,7 @@ mge_miibus_writereg(device_t dev, int phy, int reg, int value)
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{
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uint32_t retries;
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if ((MV_PHY_ADDR_BASE + device_get_unit(dev)) != phy)
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if ((MII_ADDR_BASE + device_get_unit(dev)) != phy)
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return (0);
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MGE_WRITE(sc_mge0, MGE_REG_SMI, 0x1fffffff &
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