Initial import of Ralink/Mediatek MIPS SoC support #6
SPI drivers for the various Ralink/Mediatek SoCs. There are 2 versions of the SPI controller (so far) present in the supported SoCs, hence v1 and v2 drivers. Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D5842
This commit is contained in:
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351
sys/mips/mediatek/mtk_spi_v1.c
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351
sys/mips/mediatek/mtk_spi_v1.c
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@ -0,0 +1,351 @@
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/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
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* Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice unmodified, this list of conditions, and the following
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||||
* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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//#include <machine/pmap.h>
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#include <dev/spibus/spi.h>
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#include <dev/spibus/spibusvar.h>
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#include "spibus_if.h"
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#include "opt_platform.h"
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <mips/mediatek/mtk_spi_v1.h>
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#include <dev/flash/mx25lreg.h>
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#undef MTK_SPI_DEBUG
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#ifdef MTK_SPI_DEBUG
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#define dprintf printf
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#else
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#define dprintf(x, arg...)
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#endif
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/*
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* register space access macros
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*/
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#define SPI_WRITE(sc, reg, val) do { \
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bus_write_4(sc->sc_mem_res, (reg), (val)); \
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} while (0)
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#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg))
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#define SPI_SET_BITS(sc, reg, bits) \
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SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
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#define SPI_CLEAR_BITS(sc, reg, bits) \
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SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
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struct mtk_spi_softc {
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device_t sc_dev;
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struct resource *sc_mem_res;
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};
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static int mtk_spi_probe(device_t);
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static int mtk_spi_attach(device_t);
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static int mtk_spi_detach(device_t);
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static int mtk_spi_wait(struct mtk_spi_softc *);
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static void mtk_spi_chip_activate(struct mtk_spi_softc *);
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static void mtk_spi_chip_deactivate(struct mtk_spi_softc *);
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static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
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static int mtk_spi_transfer(device_t, device_t, struct spi_command *);
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static phandle_t mtk_spi_get_node(device_t, device_t);
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static struct ofw_compat_data compat_data[] = {
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{ "ralink,rt2880-spi", 1 },
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{ "ralink,rt3050-spi", 1 },
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{ "ralink,rt3352-spi", 1 },
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{ "ralink,rt3883-spi", 1 },
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{ "ralink,rt5350-spi", 1 },
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{ "ralink,mt7620a-spi", 1 },
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{ NULL, 0 }
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};
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static int
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mtk_spi_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return(ENXIO);
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device_set_desc(dev, "MTK SPI Controller (v1)");
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return (0);
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}
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static int
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mtk_spi_attach(device_t dev)
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{
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struct mtk_spi_softc *sc = device_get_softc(dev);
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int rid;
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sc->sc_dev = dev;
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (!sc->sc_mem_res) {
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device_printf(dev, "Could not map memory\n");
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return (ENXIO);
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}
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if (mtk_spi_wait(sc)) {
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (EBUSY);
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}
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SPI_WRITE(sc, MTK_SPICFG, MSBFIRST | SPICLKPOL | TX_ON_CLK_FALL |
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SPI_CLK_DIV8); /* XXX: make it configurable */
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/*
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* W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
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* Update: divide by 4, DEV2 to fast for flash.
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*/
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device_add_child(dev, "spibus", 0);
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return (bus_generic_attach(dev));
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}
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static int
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mtk_spi_detach(device_t dev)
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{
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struct mtk_spi_softc *sc = device_get_softc(dev);
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SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI | CS_HIGH);
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (0);
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}
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static void
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mtk_spi_chip_activate(struct mtk_spi_softc *sc)
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{
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// printf("%s\n", __func__);
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mtk_spi_wait(sc);
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/*
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* Put all CSx to low
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*/
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SPI_CLEAR_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
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}
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static void
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mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
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{
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// printf("%s\n", __func__);
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mtk_spi_wait(sc);
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/*
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* Put all CSx to high
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*/
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SPI_SET_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
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}
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static int
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mtk_spi_wait(struct mtk_spi_softc *sc)
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{
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int i = 1000;
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while (i--) {
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if (!SPI_READ(sc, MTK_SPIBUSY))
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break;
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}
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if (i == 0) {
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printf("busy\n");
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return (1);
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}
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return (0);
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}
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static uint8_t
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mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
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{
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if (mtk_spi_wait(sc))
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return (EBUSY);
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if (write == MTK_SPI_WRITE) {
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SPI_WRITE(sc, MTK_SPIDATA, *data);
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SPI_SET_BITS(sc, MTK_SPICTL, START_WRITE);
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//printf("%s(W:%d)\n", __func__, *data);
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} else {/* MTK_SPI_READ */
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SPI_SET_BITS(sc, MTK_SPICTL, START_READ);
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if (mtk_spi_wait(sc))
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return (EBUSY);
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*data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
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//printf("%s(R:%d)\n", __func__, *data);
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}
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return (0);
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}
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static int
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mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
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{
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struct mtk_spi_softc *sc;
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uint8_t *buf, byte, *tx_buf;
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struct spibus_ivar *devi = SPIBUS_IVAR(child);
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int i, sz, error = 0, write = 0;
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sc = device_get_softc(dev);
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if (devi->cs != 0)
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/* Only 1 CS */
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return (ENXIO);
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/* There is always a command to transfer. */
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tx_buf = (uint8_t *)(cmd->tx_cmd);
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/* Perform some fixup because MTK dont support duplex SPI */
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switch(tx_buf[0]) {
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case CMD_READ_IDENT:
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cmd->tx_cmd_sz = 1;
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cmd->rx_cmd_sz = 3;
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break;
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case CMD_ENTER_4B_MODE:
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case CMD_EXIT_4B_MODE:
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case CMD_WRITE_ENABLE:
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case CMD_WRITE_DISABLE:
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cmd->tx_cmd_sz = 1;
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cmd->rx_cmd_sz = 0;
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break;
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case CMD_READ_STATUS:
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cmd->tx_cmd_sz = 1;
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cmd->rx_cmd_sz = 1;
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break;
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case CMD_READ:
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case CMD_FAST_READ:
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cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
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break;
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case CMD_SECTOR_ERASE:
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cmd->rx_cmd_sz = 0;
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break;
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case CMD_PAGE_PROGRAM:
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cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
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break;
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}
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mtk_spi_chip_activate(sc);
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if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
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buf = (uint8_t *)(cmd->rx_cmd);
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tx_buf = (uint8_t *)(cmd->tx_cmd);
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sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz;
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for (i = 0; i < sz; i++) {
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if(i < cmd->tx_cmd_sz) {
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byte = tx_buf[i];
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error = mtk_spi_txrx(sc, &byte,
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MTK_SPI_WRITE);
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if (error)
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goto mtk_spi_transfer_fail;
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continue;
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}
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error = mtk_spi_txrx(sc, &byte,
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MTK_SPI_READ);
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if (error)
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goto mtk_spi_transfer_fail;
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buf[i] = byte;
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}
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}
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/*
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* Transfer/Receive data
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*/
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if (cmd->tx_data_sz + cmd->rx_data_sz) {
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write = (cmd->tx_data_sz > 0)?1:0;
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buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
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sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
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for (i = 0; i < sz; i++) {
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byte = buf[i];
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error = mtk_spi_txrx(sc, &byte,
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write ? MTK_SPI_WRITE : MTK_SPI_READ);
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if (error)
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goto mtk_spi_transfer_fail;
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buf[i] = byte;
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}
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}
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mtk_spi_transfer_fail:
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mtk_spi_chip_deactivate(sc);
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return (error);
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}
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static phandle_t
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mtk_spi_get_node(device_t bus, device_t dev)
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{
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/* We only have one child, the SPI bus, which needs our own node. */
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return (ofw_bus_get_node(bus));
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}
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static device_method_t mtk_spi_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mtk_spi_probe),
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DEVMETHOD(device_attach, mtk_spi_attach),
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DEVMETHOD(device_detach, mtk_spi_detach),
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DEVMETHOD(spibus_transfer, mtk_spi_transfer),
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node),
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DEVMETHOD_END
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};
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static driver_t mtk_spi_driver = {
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.name = "spi",
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.methods = mtk_spi_methods,
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.size = sizeof(struct mtk_spi_softc),
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};
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static devclass_t mtk_spi_devclass;
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DRIVER_MODULE(mtk_spi_v1, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
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71
sys/mips/mediatek/mtk_spi_v1.h
Normal file
71
sys/mips/mediatek/mtk_spi_v1.h
Normal file
@ -0,0 +1,71 @@
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/*-
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* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
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* Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
|
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* Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
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* Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
|
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* All rights reserved.
|
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*
|
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MTK_SPIVAR_H_
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#define _MTK_SPIVAR_H_
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/* SPI controller interface */
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#define MTK_SPISTAT 0x00
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/* SPIBUSY is alias for SPIBUSY, because SPISTAT have only BUSY bit*/
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#define MTK_SPIBUSY MTK_SPISTAT
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#define MTK_SPICFG 0x10
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#define MSBFIRST (1<<8)
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#define SPICLKPOL (1<<6)
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#define CAPT_ON_CLK_FALL (1<<5)
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#define TX_ON_CLK_FALL (1<<4)
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#define HIZSPI (1<<3) /* Set SPI pins to Tri-state */
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#define SPI_CLK_SHIFT 0 /* SPI clock divide control */
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#define SPI_CLK_MASK 0x00000007
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#define SPI_CLK_DIV2 0
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#define SPI_CLK_DIV4 1
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#define SPI_CLK_DIV8 2
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#define SPI_CLK_DIV16 3
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#define SPI_CLK_DIV32 4
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#define SPI_CLK_DIV64 5
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#define SPI_CLK_DIV128 6
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#define SPI_CLK_DISABLED 7
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#define MTK_SPICTL 0x14
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#define HIZSMOSI (1<<3)
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#define START_WRITE (1<<2)
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#define START_READ (1<<1)
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#define CS_HIGH (1<<0)
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#define MTK_SPIDATA 0x20
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#define SPIDATA_MASK 0x000000ff
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#define MTK_SPI_WRITE 1
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#define MTK_SPI_READ 0
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#endif /* _MTK_SPIVAR_H_ */
|
357
sys/mips/mediatek/mtk_spi_v2.c
Normal file
357
sys/mips/mediatek/mtk_spi_v2.c
Normal file
@ -0,0 +1,357 @@
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/*-
|
||||
* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
|
||||
* Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
|
||||
* Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
|
||||
* Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/bus.h>
|
||||
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/module.h>
|
||||
#include <sys/rman.h>
|
||||
#include <sys/lock.h>
|
||||
#include <sys/mutex.h>
|
||||
|
||||
#include <machine/bus.h>
|
||||
#include <machine/cpu.h>
|
||||
//#include <machine/pmap.h>
|
||||
|
||||
#include <dev/spibus/spi.h>
|
||||
#include <dev/spibus/spibusvar.h>
|
||||
#include "spibus_if.h"
|
||||
|
||||
#include "opt_platform.h"
|
||||
|
||||
#include <dev/ofw/openfirm.h>
|
||||
#include <dev/ofw/ofw_bus.h>
|
||||
#include <dev/ofw/ofw_bus_subr.h>
|
||||
|
||||
#include <mips/mediatek/mtk_spi_v2.h>
|
||||
#include <dev/flash/mx25lreg.h>
|
||||
|
||||
#undef MTK_SPI_DEBUG
|
||||
#ifdef MTK_SPI_DEBUG
|
||||
#define dprintf printf
|
||||
#else
|
||||
#define dprintf(x, arg...)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* register space access macros
|
||||
*/
|
||||
#define SPI_WRITE(sc, reg, val) do { \
|
||||
bus_write_4(sc->sc_mem_res, (reg), (val)); \
|
||||
} while (0)
|
||||
|
||||
#define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg))
|
||||
|
||||
#define SPI_SET_BITS(sc, reg, bits) \
|
||||
SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
|
||||
|
||||
#define SPI_CLEAR_BITS(sc, reg, bits) \
|
||||
SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
|
||||
|
||||
struct mtk_spi_softc {
|
||||
device_t sc_dev;
|
||||
struct resource *sc_mem_res;
|
||||
};
|
||||
|
||||
static int mtk_spi_probe(device_t);
|
||||
static int mtk_spi_attach(device_t);
|
||||
static int mtk_spi_detach(device_t);
|
||||
static int mtk_spi_wait(struct mtk_spi_softc *);
|
||||
static void mtk_spi_chip_activate(struct mtk_spi_softc *);
|
||||
static void mtk_spi_chip_deactivate(struct mtk_spi_softc *);
|
||||
static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
|
||||
static int mtk_spi_transfer(device_t, device_t, struct spi_command *);
|
||||
static phandle_t mtk_spi_get_node(device_t, device_t);
|
||||
|
||||
static struct ofw_compat_data compat_data[] = {
|
||||
{ "ralink,mt7621-spi", 1 },
|
||||
{ "ralink,mtk7628an-spi", 1 },
|
||||
{ NULL, 0 }
|
||||
};
|
||||
|
||||
static int
|
||||
mtk_spi_probe(device_t dev)
|
||||
{
|
||||
|
||||
if (!ofw_bus_status_okay(dev))
|
||||
return (ENXIO);
|
||||
|
||||
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
|
||||
return(ENXIO);
|
||||
|
||||
device_set_desc(dev, "MTK SPI Controller (v2)");
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
mtk_spi_attach(device_t dev)
|
||||
{
|
||||
struct mtk_spi_softc *sc = device_get_softc(dev);
|
||||
uint32_t val;
|
||||
int rid;
|
||||
|
||||
sc->sc_dev = dev;
|
||||
rid = 0;
|
||||
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
if (!sc->sc_mem_res) {
|
||||
device_printf(dev, "Could not map memory\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
|
||||
if (mtk_spi_wait(sc)) {
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
|
||||
return (EBUSY);
|
||||
}
|
||||
|
||||
val = SPI_READ(sc, MTK_SPIMASTER);
|
||||
val &= ~(0xfff << 16);
|
||||
val |= 13 << 16;
|
||||
val |= 7 << 29;
|
||||
val |= 1 << 2;
|
||||
SPI_WRITE(sc, MTK_SPIMASTER, val);
|
||||
/*
|
||||
* W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
|
||||
* Update: divide by 4, DEV2 to fast for flash.
|
||||
*/
|
||||
|
||||
device_add_child(dev, "spibus", 0);
|
||||
return (bus_generic_attach(dev));
|
||||
}
|
||||
|
||||
static int
|
||||
mtk_spi_detach(device_t dev)
|
||||
{
|
||||
struct mtk_spi_softc *sc = device_get_softc(dev);
|
||||
|
||||
//SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI | CS_HIGH);
|
||||
|
||||
if (sc->sc_mem_res)
|
||||
bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
mtk_spi_chip_activate(struct mtk_spi_softc *sc)
|
||||
{
|
||||
// printf("%s\n", __func__);
|
||||
mtk_spi_wait(sc);
|
||||
/*
|
||||
* Put all CSx to low
|
||||
*/
|
||||
SPI_SET_BITS(sc, MTK_SPIPOLAR, 1);
|
||||
}
|
||||
|
||||
static void
|
||||
mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
|
||||
{
|
||||
// printf("%s\n", __func__);
|
||||
mtk_spi_wait(sc);
|
||||
/*
|
||||
* Put all CSx to high
|
||||
*/
|
||||
SPI_CLEAR_BITS(sc, MTK_SPIPOLAR, 1);
|
||||
}
|
||||
|
||||
static int
|
||||
mtk_spi_wait(struct mtk_spi_softc *sc)
|
||||
{
|
||||
int i = 1000;
|
||||
|
||||
while (i--) {
|
||||
if (!(SPI_READ(sc, MTK_SPITRANS) & SPIBUSY))
|
||||
break;
|
||||
}
|
||||
if (i == 0) {
|
||||
//printf("busy\n");
|
||||
return (1);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
|
||||
{
|
||||
|
||||
if (mtk_spi_wait(sc))
|
||||
return (0xff);
|
||||
|
||||
if (write == MTK_SPI_WRITE) {
|
||||
SPI_WRITE(sc, MTK_SPIOPCODE, (*data));
|
||||
SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<24));
|
||||
} else {
|
||||
SPI_WRITE(sc, MTK_SPIMOREBUF, (8<<12));
|
||||
}
|
||||
|
||||
SPI_SET_BITS(sc, MTK_SPITRANS, SPISTART);
|
||||
|
||||
if (mtk_spi_wait(sc))
|
||||
return (0xff);
|
||||
|
||||
if (write == MTK_SPI_READ) {
|
||||
*data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static int
|
||||
mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
|
||||
{
|
||||
struct mtk_spi_softc *sc;
|
||||
uint8_t *buf, byte, *tx_buf;
|
||||
struct spibus_ivar *devi = SPIBUS_IVAR(child);
|
||||
int i, sz, error, write = 0;
|
||||
|
||||
sc = device_get_softc(dev);
|
||||
|
||||
if (devi->cs != 0)
|
||||
/* Only 1 CS */
|
||||
return (ENXIO);
|
||||
|
||||
/* There is always a command to transfer. */
|
||||
tx_buf = (uint8_t *)(cmd->tx_cmd);
|
||||
|
||||
/* Perform some fixup because MTK dont support duplex SPI */
|
||||
switch(tx_buf[0]) {
|
||||
case CMD_READ_IDENT:
|
||||
cmd->tx_cmd_sz = 1;
|
||||
cmd->rx_cmd_sz = 3;
|
||||
break;
|
||||
case CMD_ENTER_4B_MODE:
|
||||
case CMD_EXIT_4B_MODE:
|
||||
case CMD_WRITE_ENABLE:
|
||||
case CMD_WRITE_DISABLE:
|
||||
cmd->tx_cmd_sz = 1;
|
||||
cmd->rx_cmd_sz = 0;
|
||||
break;
|
||||
case CMD_READ_STATUS:
|
||||
cmd->tx_cmd_sz = 1;
|
||||
cmd->rx_cmd_sz = 1;
|
||||
break;
|
||||
case CMD_READ:
|
||||
case CMD_FAST_READ:
|
||||
cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
|
||||
break;
|
||||
case CMD_SECTOR_ERASE:
|
||||
cmd->rx_cmd_sz = 0;
|
||||
break;
|
||||
case CMD_PAGE_PROGRAM:
|
||||
cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
mtk_spi_chip_activate(sc);
|
||||
|
||||
if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
|
||||
buf = (uint8_t *)(cmd->rx_cmd);
|
||||
tx_buf = (uint8_t *)(cmd->tx_cmd);
|
||||
sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz;
|
||||
|
||||
for (i = 0; i < sz; i++) {
|
||||
if(i < cmd->tx_cmd_sz) {
|
||||
byte = tx_buf[i];
|
||||
error = mtk_spi_txrx(sc, &byte,
|
||||
MTK_SPI_WRITE);
|
||||
if (error)
|
||||
goto mtk_spi_transfer_fail;
|
||||
continue;
|
||||
}
|
||||
error = mtk_spi_txrx(sc, &byte,
|
||||
MTK_SPI_READ);
|
||||
if (error)
|
||||
goto mtk_spi_transfer_fail;
|
||||
buf[i] = byte;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Transfer/Receive data
|
||||
*/
|
||||
|
||||
if (cmd->tx_data_sz + cmd->rx_data_sz) {
|
||||
write = (cmd->tx_data_sz > 0)?1:0;
|
||||
buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
|
||||
sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
|
||||
|
||||
for (i = 0; i < sz; i++) {
|
||||
byte = buf[i];
|
||||
error = mtk_spi_txrx(sc, &byte,
|
||||
write ? MTK_SPI_WRITE : MTK_SPI_READ);
|
||||
if (error)
|
||||
goto mtk_spi_transfer_fail;
|
||||
buf[i] = byte;
|
||||
}
|
||||
}
|
||||
mtk_spi_transfer_fail:
|
||||
mtk_spi_chip_deactivate(sc);
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static phandle_t
|
||||
mtk_spi_get_node(device_t bus, device_t dev)
|
||||
{
|
||||
|
||||
/* We only have one child, the SPI bus, which needs our own node. */
|
||||
return (ofw_bus_get_node(bus));
|
||||
}
|
||||
|
||||
static device_method_t mtk_spi_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_probe, mtk_spi_probe),
|
||||
DEVMETHOD(device_attach, mtk_spi_attach),
|
||||
DEVMETHOD(device_detach, mtk_spi_detach),
|
||||
|
||||
DEVMETHOD(spibus_transfer, mtk_spi_transfer),
|
||||
|
||||
/* ofw_bus interface */
|
||||
DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node),
|
||||
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t mtk_spi_driver = {
|
||||
.name = "spi",
|
||||
.methods = mtk_spi_methods,
|
||||
.size = sizeof(struct mtk_spi_softc),
|
||||
};
|
||||
|
||||
static devclass_t mtk_spi_devclass;
|
||||
|
||||
DRIVER_MODULE(mtk_spi_v2, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
|
55
sys/mips/mediatek/mtk_spi_v2.h
Normal file
55
sys/mips/mediatek/mtk_spi_v2.h
Normal file
@ -0,0 +1,55 @@
|
||||
/*-
|
||||
* Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
|
||||
* Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
|
||||
* Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
|
||||
* Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice unmodified, this list of conditions, and the following
|
||||
* disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
*/
|
||||
|
||||
#ifndef _MTK_SPI_NEWVAR_H_
|
||||
#define _MTK_SPI_NEWVAR_H_
|
||||
|
||||
/* SPI controller interface */
|
||||
|
||||
#define MTK_SPITRANS 0x00
|
||||
#define SPIBUSY (1<<16)
|
||||
#define SPISTART (1<<8)
|
||||
|
||||
#define MTK_SPIMASTER 0x28
|
||||
|
||||
#define MTK_SPIMOREBUF 0x2C
|
||||
|
||||
#define MTK_SPIOPCODE 0x04
|
||||
#define MTK_SPIDATA 0x08
|
||||
#define SPIDATA_MASK 0x000000ff
|
||||
|
||||
#define MTK_SPI_WRITE 1
|
||||
#define MTK_SPI_READ 0
|
||||
|
||||
#define MTK_SPIPOLAR 0x38
|
||||
|
||||
#endif /* _MTK_SPI_NEWVAR_H_ */
|
Loading…
x
Reference in New Issue
Block a user