Merge from projects/mips to head by hand:
Defintions for cavium uart (do they belong here?)
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@ -52,6 +52,7 @@
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#define REG_IIR com_iir
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#define IIR_IMASK 0xf
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#define IIR_RXTOUT 0xc
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#define IIR_BUSY 0x7
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#define IIR_RLS 0x6
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#define IIR_RXRDY 0x4
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#define IIR_TXRDY 0x2
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@ -181,6 +182,10 @@
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#define com_xoff1 6 /* XOFF 1 character (R/W) */
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#define com_xoff2 7 /* XOFF 2 character (R/W) */
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#define com_usr 39 /* Octeon 16750/16550 Uart Status Reg */
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#define REG_USR com_usr
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#define USR_TXFIFO_NOTFULL 2 /* Uart TX FIFO Not full */
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/* 16950 register #1. Access enabled by ACR[7]. Also requires !LCR[7]. */
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#define com_asr 1 /* additional status register (R[0-7]/W[0-1]) */
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