x86: Decode AMD "Extended Feature Extensions ID EBX" bits

In particular, this determines CPU support for the CLZERO instruction.

(No, I am not making this name up.)

Sponsored by:	Dell EMC Isilon
This commit is contained in:
Conrad Meyer 2017-09-20 18:30:37 +00:00
parent 81326306dd
commit 194446f9b7
3 changed files with 20 additions and 0 deletions

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@ -330,6 +330,13 @@
#define AMDPM_TSC_INVARIANT 0x00000100
#define AMDPM_CPB 0x00000200
/*
* AMD extended function 8000_0008h ebx info (amd_extended_feature_extensions)
*/
#define AMDFEID_CLZERO 0x00000001
#define AMDFEID_IRPERF 0x00000002
#define AMDFEID_XSAVEERPTR 0x00000004
/*
* AMD extended function 8000_0008h ecx info
*/

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@ -46,6 +46,7 @@ extern u_int amd_feature;
extern u_int amd_feature2;
extern u_int amd_rascap;
extern u_int amd_pminfo;
extern u_int amd_extended_feature_extensions;
extern u_int via_feature_rng;
extern u_int via_feature_xcrypt;
extern u_int cpu_clflush_line_size;

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@ -93,6 +93,7 @@ u_int amd_feature; /* AMD feature flags */
u_int amd_feature2; /* AMD feature flags */
u_int amd_rascap; /* AMD RAS capabilities */
u_int amd_pminfo; /* AMD advanced power management info */
u_int amd_extended_feature_extensions;
u_int via_feature_rng; /* VIA RNG features */
u_int via_feature_xcrypt; /* VIA ACE features */
u_int cpu_high; /* Highest arg to CPUID */
@ -992,6 +993,16 @@ printcpuinfo(void)
}
}
if (amd_extended_feature_extensions != 0) {
printf("\n "
"AMD Extended Feature Extensions ID EBX="
"0x%b", amd_extended_feature_extensions,
"\020"
"\001CLZERO"
"\002IRPerf"
"\003XSaveErPtr");
}
if (via_feature_rng != 0 || via_feature_xcrypt != 0)
print_via_padlock_info();
@ -1468,6 +1479,7 @@ finishidentcpu(void)
if (cpu_exthigh >= 0x80000008) {
do_cpuid(0x80000008, regs);
cpu_maxphyaddr = regs[0] & 0xff;
amd_extended_feature_extensions = regs[1];
cpu_procinfo2 = regs[2];
} else {
cpu_maxphyaddr = (cpu_feature & CPUID_PAE) != 0 ? 36 : 32;