Set ATOMIC endian mode in mlx5 core.
The hardware is capable of 2 requestor endianness modes for standard 8 byte atomics: BE (0x0) and host endianness (0x1). Read the supported modes from hca atomic capabilities and configure HW to host endianness mode if supported. Sponsored by: Mellanox Technologies MFC after: 1 week
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500d0c409e
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@ -74,6 +74,11 @@ struct mlx5_device_context {
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void *context;
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};
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enum {
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MLX5_ATOMIC_REQ_MODE_BE = 0x0,
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MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS = 0x1,
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};
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static struct mlx5_profile profiles[] = {
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[0] = {
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.mask = 0,
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@ -393,6 +398,53 @@ query_ex:
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return err;
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}
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static int handle_hca_cap_atomic(struct mlx5_core_dev *dev)
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{
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void *set_ctx;
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void *set_hca_cap;
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int set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
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int req_endianness;
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int err;
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if (MLX5_CAP_GEN(dev, atomic)) {
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err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC,
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HCA_CAP_OPMOD_GET_MAX);
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if (err)
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return err;
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err = mlx5_core_get_caps(dev, MLX5_CAP_ATOMIC,
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HCA_CAP_OPMOD_GET_CUR);
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if (err)
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return err;
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} else {
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return 0;
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}
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req_endianness =
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MLX5_CAP_ATOMIC(dev,
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supported_atomic_req_8B_endianess_mode_1);
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if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS)
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return 0;
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set_ctx = kzalloc(set_sz, GFP_KERNEL);
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if (!set_ctx)
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return -ENOMEM;
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MLX5_SET(set_hca_cap_in, set_ctx, op_mod,
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MLX5_SET_HCA_CAP_OP_MOD_ATOMIC << 1);
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set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);
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/* Set requestor to host endianness */
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MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode,
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MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS);
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err = set_caps(dev, set_ctx, set_sz);
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kfree(set_ctx);
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return err;
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}
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static int set_hca_ctrl(struct mlx5_core_dev *dev)
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{
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struct mlx5_reg_host_endianess he_in;
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@ -717,15 +769,21 @@ static int mlx5_dev_init(struct mlx5_core_dev *dev, struct pci_dev *pdev)
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goto err_pagealloc_stop;
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}
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err = set_hca_ctrl(dev);
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if (err) {
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device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n");
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goto reclaim_boot_pages;
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}
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err = handle_hca_cap(dev);
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if (err) {
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device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap failed\n");
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goto reclaim_boot_pages;
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}
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err = set_hca_ctrl(dev);
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err = handle_hca_cap_atomic(dev);
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if (err) {
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device_printf((&pdev->dev)->bsddev, "ERR: ""set_hca_ctrl failed\n");
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device_printf((&pdev->dev)->bsddev, "ERR: ""handle_hca_cap_atomic failed\n");
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goto reclaim_boot_pages;
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}
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@ -73,6 +73,11 @@ enum {
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MLX5_MODIFY_RQT_BITMASK_RQN_LIST = 0x1,
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};
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enum {
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MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE = 0x0,
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MLX5_SET_HCA_CAP_OP_MOD_ATOMIC = 0x3,
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};
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enum {
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MLX5_CMD_OP_QUERY_HCA_CAP = 0x100,
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MLX5_CMD_OP_QUERY_ADAPTER = 0x101,
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