From 1a2e5c004da6f92568337572e85e25212c99732d Mon Sep 17 00:00:00 2001 From: Andrew Turner Date: Thu, 7 Sep 2017 16:12:56 +0000 Subject: [PATCH] Fix the value of ID_AA64ISAR1_DPB_SHIFT, the field is bits 3:0. Sponsored by: DARPA, AFRL --- sys/arm64/include/armreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 773ca968a0ac..c396a7e229dc 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -240,7 +240,7 @@ /* ID_AA64ISAR1_EL1 */ #define ID_AA64ISAR1_MASK 0x0000000f -#define ID_AA64ISAR1_DPB_SHIFT 4 +#define ID_AA64ISAR1_DPB_SHIFT 0 #define ID_AA64ISAR1_DPB_MASK (0xf << ID_AA64ISAR1_DPB_SHIFT) #define ID_AA64ISAR1_DPB(x) ((x) & ID_AA64ISAR1_DPB_MASK) #define ID_AA64ISAR1_DPB_NONE (0x0 << ID_AA64ISAR1_DPB_SHIFT)