Display the correct value for cache Level of Coherency. Like the other
levels being displayed here, its value needs a +1 adjustment.
This commit is contained in:
parent
c4c27bc97f
commit
1af5f5366c
@ -457,7 +457,7 @@ identify_arm_cpu(void)
|
||||
|
||||
if (arm_cache_level) {
|
||||
printf("LoUU:%d LoC:%d LoUIS:%d \n", CPU_CLIDR_LOUU(arm_cache_level) + 1,
|
||||
arm_cache_loc, CPU_CLIDR_LOUIS(arm_cache_level) + 1);
|
||||
arm_cache_loc + 1, CPU_CLIDR_LOUIS(arm_cache_level) + 1);
|
||||
i = 0;
|
||||
while (((type = CPU_CLIDR_CTYPE(arm_cache_level, i)) != 0) && i < 7) {
|
||||
printf("Cache level %d: \n", i + 1);
|
||||
|
Loading…
Reference in New Issue
Block a user