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Third round of updates to the ATA driver.

Browse Source 
More DMA cleanups, including fix for breakage on older Promise controllers.

Add more ways of getting to the ATA registers.
This commit is contained in:
Søren Schmidt 2003-04-07 14:12:12 +00:00
parent d4c6c8f992
commit 1b39bd2412
6 changed files with 136 additions and 62 deletions
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2
sys/dev/ata/ata-all.c
View File

@ -447,7 +447,7 @@ ata_getparam(struct ata_device *atadev, u_int8_t command)
/* apparently some devices needs this repeated */
do {
if (ata_command(atadev, command, 0, 0, 0,
dumping ? ATA_WAIT_READY : ATA_WAIT_INTR)) { /* XXX */
dumping ? ATA_WAIT_READY : ATA_WAIT_INTR)) {
ata_prtdev(atadev, "%s identify failed\n",
command == ATA_C_ATAPI_IDENTIFY ? "ATAPI" : "ATA");
free(ata_parm, M_ATA);

103
sys/dev/ata/ata-all.h
View File

@ -145,6 +145,7 @@
#define ATA_BMCMD_START_STOP 0x01
#define ATA_BMCMD_WRITE_READ 0x08
#define ATA_BMCTL_PORT 0x09
#define ATA_BMDEVSPEC_0 0x0a
#define ATA_BMSTAT_PORT 0x0b
#define ATA_BMSTAT_ACTIVE 0x01
@ -158,6 +159,8 @@
#define ATA_BMDEVSPEC_1 0x0c
#define ATA_BMDTP_PORT 0x0d
#define ATA_IDX_ADDR 0x0e
#define ATA_IDX_DATA 0x0f
#define ATA_MAX_RES 0x10
/* structure for holding DMA address data */
@ -207,7 +210,6 @@ struct ata_dma_data {
int (*setup)(struct ata_device *, caddr_t, int32_t);
int (*start)(struct ata_channel *, caddr_t, int32_t, int);
int (*stop)(struct ata_channel *);
int (*status)(struct ata_channel *);
};
/* structure holding resources for an ATA channel */
@ -365,31 +367,102 @@ int ata_limit_mode(struct ata_device *, int, int);
bus_space_write_multi_stream_4(rman_get_bustag((res)), \
rman_get_bushandle((res)), \
(offset), (addr), (count))
#define ATA_IDX_SET(ch, idx) \
ATA_OUTB(ch->r_io[ATA_IDX_ADDR].res, ch->r_io[ATA_IDX_ADDR].offset, \
ch->r_io[idx].offset)
#define ATA_IDX_INB(ch, idx) \
ATA_INB(ch->r_io[idx].res, ch->r_io[idx].offset)
((ch->r_io[idx].res) \
? ATA_INB(ch->r_io[idx].res, ch->r_io[idx].offset) \
: (ATA_IDX_SET(ch, idx), \
ATA_INB(ch->r_io[ATA_IDX_DATA].res, ch->r_io[ATA_IDX_DATA].offset)))
#define ATA_IDX_INW(ch, idx) \
ATA_INW(ch->r_io[idx].res, ch->r_io[idx].offset)
((ch->r_io[idx].res) \
? ATA_INW(ch->r_io[idx].res, ch->r_io[idx].offset) \
: (ATA_IDX_SET(ch, idx), \
ATA_INW(ch->r_io[ATA_IDX_DATA].res, ch->r_io[ATA_IDX_DATA].offset)))
#define ATA_IDX_INL(ch, idx) \
ATA_INL(ch->r_io[idx].res, ch->r_io[idx].offset)
((ch->r_io[idx].res) \
? ATA_INL(ch->r_io[idx].res, ch->r_io[idx].offset) \
: (ATA_IDX_SET(ch, idx), \
ATA_INL(ch->r_io[ATA_IDX_DATA].res, ch->r_io[ATA_IDX_DATA].offset)))
#define ATA_IDX_INSW(ch, idx, addr, count) \
ATA_INSW(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_INSW(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_INSW(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_INSW_STRM(ch, idx, addr, count) \
ATA_INSW_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_INSW_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_INSW_STRM(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_INSL(ch, idx, addr, count) \
ATA_INSL(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_INSL(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_INSL(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_INSL_STRM(ch, idx, addr, count) \
ATA_INSL_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_INSL_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_INSL_STRM(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_OUTB(ch, idx, value) \
ATA_OUTB(ch->r_io[idx].res, ch->r_io[idx].offset, value)
((ch->r_io[idx].res) \
? ATA_OUTB(ch->r_io[idx].res, ch->r_io[idx].offset, value) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTB(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, value)))
#define ATA_IDX_OUTW(ch, idx, value) \
ATA_OUTW(ch->r_io[idx].res, ch->r_io[idx].offset, value)
((ch->r_io[idx].res) \
? ATA_OUTW(ch->r_io[idx].res, ch->r_io[idx].offset, value) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTW(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, value)))
#define ATA_IDX_OUTL(ch, idx, value) \
ATA_OUTL(ch->r_io[idx].res, ch->r_io[idx].offset, value)
((ch->r_io[idx].res) \
? ATA_OUTL(ch->r_io[idx].res, ch->r_io[idx].offset, value) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTL(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, value)))
#define ATA_IDX_OUTSW(ch, idx, addr, count) \
ATA_OUTSW(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_OUTSW(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTSW(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_OUTSW_STRM(ch, idx, addr, count) \
ATA_OUTSW_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_OUTSW_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTSW_STRM(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_OUTSL(ch, idx, addr, count) \
ATA_OUTSL(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_OUTSL(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTSL(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))
#define ATA_IDX_OUTSL_STRM(ch, idx, addr, count) \
ATA_OUTSL_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count)
((ch->r_io[idx].res) \
? ATA_OUTSL_STRM(ch->r_io[idx].res, ch->r_io[idx].offset, addr, count) \
: (ATA_IDX_SET(ch, idx), \
ATA_OUTSL_STRM(ch->r_io[ATA_IDX_DATA].res, \
ch->r_io[ATA_IDX_DATA].offset, addr, count)))

57
sys/dev/ata/ata-chipset.c
View File

@ -135,7 +135,8 @@ ata_generic_intr(void *data)
if (!(ch = ctlr->interrupt[unit].argument))
continue;
if (ch->dma->flags & ATA_DMA_ACTIVE) {
if (!((dmastat = ch->dma->status(ch)) & ATA_BMSTAT_INTERRUPT))
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT);
DELAY(1);
@ -220,7 +221,8 @@ ata_acard_intr(void *data)
continue;
ch = ctlr->interrupt[unit].argument;
if (ch->dma->flags & ATA_DMA_ACTIVE) {
if (!((dmastat = ch->dma->status(ch)) & ATA_BMSTAT_INTERRUPT))
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT);
DELAY(1);
@ -480,7 +482,7 @@ ata_cyrix_chipinit(device_t dev)
if (ata_default_interrupt(dev))
return ENXIO;
if (ctlr->r_bmio)
if (ctlr->r_io1)
ctlr->setmode = ata_cyrix_setmode;
else
ctlr->setmode = ata_generic_setmode;
@ -664,7 +666,7 @@ ata_highpoint_intr(void *data)
for (unit = 0; unit < 2; unit++) {
if (!(ch = ctlr->interrupt[unit].argument))
continue;
if (((dmastat = ch->dma->status(ch)) &
if (((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK)) &
(ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT))!=ATA_BMSTAT_INTERRUPT)
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
@ -1014,7 +1016,6 @@ ata_promise_chipinit(device_t dev)
}
break;
}
ctlr->setmode = ata_promise_setmode;
return 0;
}
@ -1023,7 +1024,7 @@ static void
ata_promise_old_intr(void *data)
{
struct ata_pci_controller *ctlr = data;
struct ata_channel *ch = ctlr->interrupt[0].argument;
struct ata_channel *ch;
u_int8_t dmastat;
int unit;
@ -1031,9 +1032,10 @@ ata_promise_old_intr(void *data)
for (unit = 0; unit < 2; unit++) {
if (!(ch = ctlr->interrupt[unit].argument))
continue;
if (ATA_INL(ctlr->r_bmio, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)){
if (ATA_INL(ctlr->r_io1, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)) {
if (ch->dma->flags & ATA_DMA_ACTIVE) {
if (!((dmastat = ch->dma->status(ch)) & ATA_BMSTAT_INTERRUPT))
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT);
DELAY(1);
@ -1058,9 +1060,10 @@ ata_promise_tx2_intr(void *data)
ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b);
if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x20) {
if (ch->dma->flags & ATA_DMA_ACTIVE) {
if (!((dmastat = ch->dma->status(ch)) & ATA_BMSTAT_INTERRUPT))
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT);
DELAY(1);
}
ctlr->interrupt[unit].function(ch);
@ -1150,7 +1153,7 @@ ata_promise_old_dmainit(struct ata_channel *ch)
static int
ata_promise_old_dmastart(struct ata_channel *ch,
caddr_t data, int32_t count, int dir)
caddr_t data, int32_t count, int dir)
{
struct ata_pci_controller *ctlr =
device_get_softc(device_get_parent(ch->dev));
@ -1158,14 +1161,19 @@ ata_promise_old_dmastart(struct ata_channel *ch,
if ((error = ata_dmastart(ch, data, count, dir)))
return error;
if (ch->flags & ATA_48BIT_ACTIVE) {
ATA_OUTB(ctlr->r_bmio, 0x11,
ATA_INB(ctlr->r_bmio, 0x11) | (ch->unit ? 0x08 : 0x02));
ATA_OUTL(ctlr->r_bmio, 0x20,
ATA_OUTB(ctlr->r_io1, 0x11,
ATA_INB(ctlr->r_io1, 0x11) | (ch->unit ? 0x08 : 0x02));
ATA_OUTL(ctlr->r_io1, 0x20,
(dir ? 0x05000000 : 0x06000000) | (count >> 1));
}
return 0;
ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab);
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0);
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
ATA_IDX_INB(ch, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
return error;
}
static int
@ -1173,13 +1181,19 @@ ata_promise_old_dmastop(struct ata_channel *ch)
{
struct ata_pci_controller *ctlr =
device_get_softc(device_get_parent(ch->dev));
int error;
if (ch->flags & ATA_48BIT_ACTIVE) {
ATA_OUTB(ctlr->r_bmio, 0x11,
ATA_INB(ctlr->r_bmio, 0x11) & ~(ch->unit ? 0x08 : 0x02));
ATA_OUTL(ctlr->r_bmio, 0x20, 0);
ATA_OUTB(ctlr->r_io1, 0x11,
ATA_INB(ctlr->r_io1, 0x11) & ~(ch->unit ? 0x08 : 0x02));
ATA_OUTL(ctlr->r_io1, 0x20, 0);
}
return ata_dmastop(ch);
error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT);
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
ata_dmastop(ch);
return error;
}
/*
@ -1351,7 +1365,8 @@ ata_cmd_intr(void *data)
pci_write_config(device_get_parent(ch->dev), 0x71,
(ch->unit ? 0x08 : 0x04), 1);
if (ch->dma->flags & ATA_DMA_ACTIVE) {
if (!((dmastat = ch->dma->status(ch)) & ATA_BMSTAT_INTERRUPT))
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT);
DELAY(1);

8
sys/dev/ata/ata-dma.c
View File

@ -47,7 +47,6 @@ static int ata_dmaalloc(struct ata_channel *);
static void ata_dmafree(struct ata_channel *);
static void ata_dmasetupd_cb(void *, bus_dma_segment_t *, int, int);
static int ata_dmasetup(struct ata_device *, caddr_t, int32_t);
static int ata_dmastatus(struct ata_channel *);
/* local vars */
static MALLOC_DEFINE(M_ATADMA, "ATA DMA", "ATA driver DMA");
@ -73,7 +72,6 @@ ata_dmainit(struct ata_channel *ch)
ch->dma->setup = ata_dmasetup;
ch->dma->start = ata_dmastart;
ch->dma->stop = ata_dmastop;
ch->dma->status = ata_dmastatus;
ch->dma->alignment = 2;
return 0;
}
@ -219,12 +217,6 @@ ata_dmasetup(struct ata_device *atadev, caddr_t data, int32_t count)
return 0;
}
static int
ata_dmastatus(struct ata_channel *ch)
{
return ch->dma->flags & ATA_DMA_ACTIVE;
}
int
ata_dmastart(struct ata_channel *ch, caddr_t data, int32_t count, int dir)
{

24
sys/dev/ata/ata-pci.c
View File

@ -157,8 +157,8 @@ ata_pci_attach(device_t dev)
if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) {
int rid = ATA_BMADDR_RID;
if (!ctlr->r_mem) {
if (!(ctlr->r_bmio = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
if (!ctlr->r_io2) {
if (!(ctlr->r_io1 = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
0, ~0, 1, RF_ACTIVE)))
device_printf(dev, "Busmastering DMA not configured\n");
}
@ -182,7 +182,7 @@ ata_pci_print_child(device_t dev, device_t child)
int retval = 0;
retval += bus_print_child_header(dev, child);
retval += printf(": at 0x%lx", rman_get_start(ch->r_io[0].res));
retval += printf(": at 0x%lx", rman_get_start(ch->r_io[ATA_IDX_ADDR].res));
if (ATA_MASTERDEV(dev))
retval += printf(" irq %d", 14 + ch->unit);
@ -390,10 +390,11 @@ ata_pci_allocate(device_t dev, struct ata_channel *ch)
}
ch->r_io[ATA_ALTSTAT].res = altio;
ch->r_io[ATA_ALTSTAT].offset = 0;
ch->r_io[ATA_IDX_ADDR].res = io;
if (ctlr->r_bmio) {
if (ctlr->r_io1) {
for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) {
ch->r_io[i].res = ctlr->r_bmio;
ch->r_io[i].res = ctlr->r_io1;
ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE);
}
@ -420,9 +421,9 @@ ata_pci_dmastart(struct ata_channel *ch, caddr_t data, int32_t count, int dir)
ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->mdmatab);
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0);
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
(ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR)));
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
ATA_IDX_INB(ch, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
ATA_IDX_INB(ch, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP);
return 0;
}
@ -433,7 +434,7 @@ ata_pci_dmastop(struct ata_channel *ch)
error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT);
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
ata_dmastop(ch);
@ -441,12 +442,6 @@ ata_pci_dmastop(struct ata_channel *ch)
return (error & ATA_BMSTAT_MASK);
}
static int
ata_pci_dmastatus(struct ata_channel *ch)
{
return ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
}
static int
ata_pci_dmainit(struct ata_channel *ch)
{
@ -457,7 +452,6 @@ ata_pci_dmainit(struct ata_channel *ch)
ch->dma->start = ata_pci_dmastart;
ch->dma->stop = ata_pci_dmastop;
ch->dma->status = ata_pci_dmastatus;
return 0;
}

4
sys/dev/ata/ata-pci.h
View File

@ -40,8 +40,8 @@ struct ata_chip_id {
/* structure describing a PCI ATA controller */
struct ata_pci_controller {
struct resource *r_bmio;
struct resource *r_mem;
struct resource *r_io1;
struct resource *r_io2;
struct resource *r_irq;
void *handle;
struct ata_chip_id *chip;